From patchwork Sun May 8 20:01:41 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 9040261 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 54C1FBF29F for ; Sun, 8 May 2016 20:05:42 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 406A02013D for ; Sun, 8 May 2016 20:05:41 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3B6872010E for ; Sun, 8 May 2016 20:05:40 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1azUvd-00063e-19; Sun, 08 May 2016 20:03:49 +0000 Received: from down.free-electrons.com ([37.187.137.238] helo=mail.free-electrons.com) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1azUud-0004vh-4X for linux-arm-kernel@lists.infradead.org; Sun, 08 May 2016 20:02:52 +0000 Received: by mail.free-electrons.com (Postfix, from userid 110) id B49DCA62; Sun, 8 May 2016 22:02:15 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-6.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from localhost (LFbn-1-2034-31.w90-76.abo.wanadoo.fr [90.76.103.31]) by mail.free-electrons.com (Postfix) with ESMTPSA id 2B61BA63; Sun, 8 May 2016 22:01:59 +0200 (CEST) From: Maxime Ripard To: Mike Turquette , Stephen Boyd , Chen-Yu Tsai Subject: [PATCH 06/16] clk: sunxi-ng: Add divider table clock Date: Sun, 8 May 2016 22:01:41 +0200 Message-Id: <1462737711-10017-7-git-send-email-maxime.ripard@free-electrons.com> X-Mailer: git-send-email 2.8.2 In-Reply-To: <1462737711-10017-1-git-send-email-maxime.ripard@free-electrons.com> References: <1462737711-10017-1-git-send-email-maxime.ripard@free-electrons.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160508_130247_771561_1CFB7BEF X-CRM114-Status: GOOD ( 20.44 ) X-Spam-Score: -4.0 (----) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Boris Brezillon , Vishnu Patekar , Andre Przywara , Hans de Goede , Rob Herring , Maxime Ripard , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add support for clocks based on a divider tables. Signed-off-by: Maxime Ripard --- drivers/clk/sunxi-ng/Makefile | 1 + drivers/clk/sunxi-ng/ccu_div_table.c | 117 +++++++++++++++++++++++++++++++++++ drivers/clk/sunxi-ng/ccu_div_table.h | 75 ++++++++++++++++++++++ 3 files changed, 193 insertions(+) create mode 100644 drivers/clk/sunxi-ng/ccu_div_table.c create mode 100644 drivers/clk/sunxi-ng/ccu_div_table.h diff --git a/drivers/clk/sunxi-ng/Makefile b/drivers/clk/sunxi-ng/Makefile index aa5c411ff8ea..f20c6c8f217c 100644 --- a/drivers/clk/sunxi-ng/Makefile +++ b/drivers/clk/sunxi-ng/Makefile @@ -1,6 +1,7 @@ obj-y += ccu_common.o obj-y += ccu_reset.o +obj-y += ccu_div_table.o obj-y += ccu_fixed_factor.o obj-y += ccu_gate.o obj-y += ccu_mux.o diff --git a/drivers/clk/sunxi-ng/ccu_div_table.c b/drivers/clk/sunxi-ng/ccu_div_table.c new file mode 100644 index 000000000000..cbfff0bd47e3 --- /dev/null +++ b/drivers/clk/sunxi-ng/ccu_div_table.c @@ -0,0 +1,117 @@ +/* + * Copyright (C) 2016 Maxime Ripard + * Maxime Ripard + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + */ + +#include + +#include "ccu_div_table.h" +#include "ccu_gate.h" + +static void ccu_div_table_find_best(unsigned long parent, unsigned long rate, + struct ccu_div_table *ct, + unsigned int *index) +{ + unsigned long best_rate = 0; + unsigned int best_index = 0; + unsigned int _index; + + for (_index = 0; _index <= ct->num_divs; _index++) { + unsigned long tmp_rate = parent / ct->table[_index]; + + if (tmp_rate > rate) + continue; + + if ((rate - tmp_rate) < (rate - best_rate)) { + best_rate = tmp_rate; + best_index = _index; + } + } + + *index = best_index; +} + +static void ccu_div_table_disable(struct clk_hw *hw) +{ + struct ccu_div_table *ct = hw_to_ccu_div_table(hw); + + return ccu_gate_helper_disable(&ct->common, ct->enable); +} + +static int ccu_div_table_enable(struct clk_hw *hw) +{ + struct ccu_div_table *ct = hw_to_ccu_div_table(hw); + + return ccu_gate_helper_enable(&ct->common, ct->enable); +} + +static int ccu_div_table_is_enabled(struct clk_hw *hw) +{ + struct ccu_div_table *ct = hw_to_ccu_div_table(hw); + + return ccu_gate_helper_is_enabled(&ct->common, ct->enable); +} + +static unsigned long ccu_div_table_recalc_rate(struct clk_hw *hw, + unsigned long parent_rate) +{ + struct ccu_div_table *ct = hw_to_ccu_div_table(hw); + unsigned long div; + u32 reg; + + reg = readl(ct->common.base + ct->common.reg); + + div = reg >> ct->div.shift; + div &= (1 << ct->div.width) - 1; + + return parent_rate / ct->table[div]; +} + +static long ccu_div_table_round_rate(struct clk_hw *hw, unsigned long rate, + unsigned long *parent_rate) +{ + struct ccu_div_table *ct = hw_to_ccu_div_table(hw); + unsigned int index; + + ccu_div_table_find_best(*parent_rate, rate, + ct, &index); + + return *parent_rate / ct->table[index]; +} + +static int ccu_div_table_set_rate(struct clk_hw *hw, unsigned long rate, + unsigned long parent_rate) +{ + struct ccu_div_table *ct = hw_to_ccu_div_table(hw); + unsigned long flags; + unsigned int index; + u32 reg; + + ccu_div_table_find_best(parent_rate, rate, ct, &index); + + spin_lock_irqsave(ct->common.lock, flags); + + reg = readl(ct->common.base + ct->common.reg); + reg &= ~GENMASK(ct->div.width + ct->div.shift, ct->div.shift); + writel(reg | ((ct->table[index]) << ct->div.shift), + ct->common.base + ct->common.reg); + + spin_unlock_irqrestore(ct->common.lock, flags); + + return 0; +} + +const struct clk_ops ccu_div_table_ops = { + .disable = ccu_div_table_disable, + .enable = ccu_div_table_enable, + .is_enabled = ccu_div_table_is_enabled, + + .recalc_rate = ccu_div_table_recalc_rate, + .round_rate = ccu_div_table_round_rate, + .set_rate = ccu_div_table_set_rate, +}; diff --git a/drivers/clk/sunxi-ng/ccu_div_table.h b/drivers/clk/sunxi-ng/ccu_div_table.h new file mode 100644 index 000000000000..bd7da49087ed --- /dev/null +++ b/drivers/clk/sunxi-ng/ccu_div_table.h @@ -0,0 +1,75 @@ +/* + * Copyright (c) 2016 Maxime Ripard. All rights reserved. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _CCU_DIV_TABLE_H_ +#define _CCU_DIV_TABLE_H_ + +#include + +#include "ccu_common.h" +#include "ccu_factor.h" + +struct ccu_div_table { + u32 enable; + + u8 *table; + int num_divs; + + struct ccu_factor div; + struct ccu_common common; +}; + +#define SUNXI_CCU_DIV_TABLE(_struct, _name, _parent, _reg, \ + _shift, _width, \ + _table, _flags) \ + struct ccu_div_table _struct = { \ + .table = _table, \ + .num_divs = ARRAY_SIZE(_table), \ + .div = SUNXI_CLK_FACTOR(_shift, _width), \ + .common = { \ + .reg = _reg, \ + .hw.init = SUNXI_HW_INIT(_name, \ + _parent, \ + &ccu_div_table_ops, \ + _flags), \ + } \ + } + +#define SUNXI_CCU_DIV_TABLE_WITH_GATE(_struct, _name, _parent, _reg, \ + _shift, _width, \ + _table, _gate, _flags) \ + struct ccu_div_table _struct = { \ + .enable = _gate, \ + .table = _table, \ + .num_divs = ARRAY_SIZE(_table), \ + .div = SUNXI_CLK_FACTOR(_shift, _width), \ + .common = { \ + .reg = _reg, \ + .features = CCU_FEATURE_GATE, \ + .hw.init = SUNXI_HW_INIT(_name, \ + _parent, \ + &ccu_div_table_ops, \ + _flags), \ + } \ + } + +static inline struct ccu_div_table *hw_to_ccu_div_table(struct clk_hw *hw) +{ + struct ccu_common *common = hw_to_ccu_common(hw); + + return container_of(common, struct ccu_div_table, common); +} + +extern const struct clk_ops ccu_div_table_ops; + +#endif /* _CCU_DIV_H_ */