From patchwork Tue May 10 20:09:30 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 9062611 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 0A0529F1D3 for ; Tue, 10 May 2016 20:23:51 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 25359200E6 for ; Tue, 10 May 2016 20:23:50 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 51CFE200E5 for ; Tue, 10 May 2016 20:23:49 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1b0EAO-0005GA-Sp; Tue, 10 May 2016 20:22:04 +0000 Received: from mail.kernel.org ([198.145.29.136]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1b0E0q-0001PA-FD for linux-arm-kernel@lists.infradead.org; Tue, 10 May 2016 20:12:38 +0000 Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E2B91201C8; Tue, 10 May 2016 20:11:50 +0000 (UTC) Received: from localhost.localdomain (89-66-181-234.dynamic.chello.pl [89.66.181.234]) (using TLSv1.2 with cipher AES128-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 33FE3201ED; Tue, 10 May 2016 20:11:47 +0000 (UTC) From: Krzysztof Kozlowski To: Kukjin Kim , Krzysztof Kozlowski , Sylwester Nawrocki , Tomasz Figa , Michael Turquette , Stephen Boyd , linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Subject: [PATCH v3 27/27] ARM: dts: exynos: Add RTC and I2C to Exynos5410 Date: Tue, 10 May 2016 22:09:30 +0200 Message-Id: <1462910970-1812-28-git-send-email-krzk@kernel.org> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1462910970-1812-1-git-send-email-krzk@kernel.org> References: <1462910970-1812-1-git-send-email-krzk@kernel.org> X-Spam-Status: No, score=-6.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160510_131213_102148_46D601E6 X-CRM114-Status: GOOD ( 14.12 ) X-Spam-Score: -6.3 (------) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Javier Martinez Canillas , Rob Herring , Krzysztof Kozlowski MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Configure Exynos5410-specific properties of RTC, I2C and HSI2C nodes. This still does not enable them on the board level though. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Javier Martinez Canillas --- arch/arm/boot/dts/exynos5410.dtsi | 66 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 66 insertions(+) diff --git a/arch/arm/boot/dts/exynos5410.dtsi b/arch/arm/boot/dts/exynos5410.dtsi index dd4d6d752865..ae64cb0a8efd 100644 --- a/arch/arm/boot/dts/exynos5410.dtsi +++ b/arch/arm/boot/dts/exynos5410.dtsi @@ -114,6 +114,9 @@ status = "disabled"; }; + /* i2c_0-3 are defined in exynos5.dtsi */ + /* hsi2c_4-7 are defined in exynos5xx.dtsi */ + pinctrl_0: pinctrl@13400000 { compatible = "samsung,exynos5410-pinctrl"; reg = <0x13400000 0x1000>; @@ -146,6 +149,62 @@ }; }; +&i2c_0 { + clocks = <&clock CLK_I2C0>; + clock-names = "i2c"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_bus>; +}; + +&i2c_1 { + clocks = <&clock CLK_I2C1>; + clock-names = "i2c"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_bus>; +}; + +&i2c_2 { + clocks = <&clock CLK_I2C2>; + clock-names = "i2c"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_bus>; +}; + +&i2c_3 { + clocks = <&clock CLK_I2C3>; + clock-names = "i2c"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c3_bus>; +}; + +&hsi2c_4 { + clocks = <&clock CLK_USI0>; + clock-names = "hsi2c"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c4_hs_bus>; +}; + +&hsi2c_5 { + clocks = <&clock CLK_USI1>; + clock-names = "hsi2c"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c5_hs_bus>; +}; + +&hsi2c_6 { + clocks = <&clock CLK_USI2>; + clock-names = "hsi2c"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c6_hs_bus>; +}; + +&hsi2c_7 { + clocks = <&clock CLK_USI3>; + clock-names = "hsi2c"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c7_hs_bus>; +}; + &mct { clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>; clock-names = "fin_pll", "mct"; @@ -156,6 +215,13 @@ clock-names = "timers"; }; +&rtc { + clocks = <&clock CLK_RTC>; + clock-names = "rtc"; + interrupt-parent = <&pmu_system_controller>; + status = "disabled"; +}; + &serial_0 { clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>; clock-names = "uart", "clk_uart_baud0";