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([80.12.39.177]) by smtp.gmail.com with ESMTPSA id kz1sm7374554wjc.46.2016.05.18.01.42.06 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 18 May 2016 01:42:08 -0700 (PDT) From: Gabriel Fernandez To: Rob Herring , Mark Rutland , Ian Campbell , Kumar Gala , Srinivas Kandagatla , Maxime Coquelin , Patrice Chotard , Russell King , Michael Turquette , Stephen Boyd , Olivier Bideau , Gabriel Fernandez , Geert Uytterhoeven , Sebastian Hesselbarth , Andrzej Hajda , Pankaj Dev , Dinh Nguyen , Arnd Bergmann , Thierry Reding Subject: [PATCH 07/11] ARM: DT: STiH407: Enable synchronous clock mode on clkgend2 Date: Wed, 18 May 2016 10:41:28 +0200 Message-Id: <1463560892-7209-8-git-send-email-gabriel.fernandez@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1463560892-7209-1-git-send-email-gabriel.fernandez@linaro.org> References: <1463560892-7209-1-git-send-email-gabriel.fernandez@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160518_014230_761656_8E31397E X-CRM114-Status: GOOD ( 12.38 ) X-Spam-Score: -2.7 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, kernel@stlinux.com, vincent.abriou@st.com, arnaud.pouliquen@st.com, linux-kernel@vger.kernel.org, Peter Griffin , Lee Jones , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, benjamin.gaignard@st.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-5.5 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds a compatibility string on clkgend2 to allow the clock driver to handle the synchronous/asynchronous modes of STiH407 Signed-off-by: Olivier Bideau Signed-off-by: Gabriel Fernandez --- arch/arm/boot/dts/stih407-clock.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/stih407-clock.dtsi b/arch/arm/boot/dts/stih407-clock.dtsi index 76c6984..bdf3998 100644 --- a/arch/arm/boot/dts/stih407-clock.dtsi +++ b/arch/arm/boot/dts/stih407-clock.dtsi @@ -256,7 +256,7 @@ clk_s_d2_flexgen: clk-s-d2-flexgen { #clock-cells = <1>; - compatible = "st,flexgen"; + compatible = "st,stih407-clkgend2", "st,flexgen"; clocks = <&clk_s_d2_quadfs 0>, <&clk_s_d2_quadfs 1>,