From patchwork Wed May 18 12:53:30 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Graf X-Patchwork-Id: 9118781 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 497A09F1D3 for ; Wed, 18 May 2016 12:55:37 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 65BFC20221 for ; Wed, 18 May 2016 12:55:36 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 06EDD201FE for ; Wed, 18 May 2016 12:55:22 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1b30z5-0004yc-Es; Wed, 18 May 2016 12:53:55 +0000 Received: from mx2.suse.de ([195.135.220.15]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1b30z2-0004l5-Fl for linux-arm-kernel@lists.infradead.org; Wed, 18 May 2016 12:53:53 +0000 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay1.suse.de (charybdis-ext.suse.de [195.135.220.254]) by mx2.suse.de (Postfix) with ESMTP id 720BDAAB6; Wed, 18 May 2016 12:53:30 +0000 (UTC) From: Alexander Graf To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v2] arm64: Allow for different DMA and CPU bus offsets Date: Wed, 18 May 2016 14:53:30 +0200 Message-Id: <1463576010-115428-1-git-send-email-agraf@suse.de> X-Mailer: git-send-email 1.8.5.6 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160518_055352_759535_EAE67505 X-CRM114-Status: GOOD ( 13.45 ) X-Spam-Score: -5.6 (-----) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: okaya@codeaurora.org, catalin.marinas@arm.com, will.deacon@arm.com, arnd@arndb.de, eric@anholt.net MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-5.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On arm64, all SoCs we supported so far either have an IOMMU or have bus addresses equal to CPU addresses. However, with the Raspberry Pi 3 coming up, this is no longer true. To allow DMA to work with an AArch64 kernel on those devices, let's allow devices to have DMA offsets again. Signed-off-by: Alexander Graf Acked-by: Arnd Bergmann Acked-by: Catalin Marinas --- This patch may conflict with another patch titled "swiotlb: prefix dma_to_phys and phys_to_dma functions" which is in flight, but hasn't seen an update since March. Since this patch is very small and isolated to arm64, I'd prefer to keep them separate rather than combine them. So if the other patch gets accepted first, I'm happy to rebase this patch on top of a topic branch that would address the rename. v1 -> v2: - Use PAGE_SHIFT explicitly rather than __pfn_to_phys and __phys_to_pfn --- arch/arm64/include/asm/dma-mapping.h | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/arch/arm64/include/asm/dma-mapping.h b/arch/arm64/include/asm/dma-mapping.h index ba437f0..c14e9cd 100644 --- a/arch/arm64/include/asm/dma-mapping.h +++ b/arch/arm64/include/asm/dma-mapping.h @@ -66,12 +66,16 @@ static inline bool is_device_dma_coherent(struct device *dev) static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr) { - return (dma_addr_t)paddr; + dma_addr_t dev_addr = (dma_addr_t)paddr; + + return dev_addr - ((dma_addr_t)dev->dma_pfn_offset << PAGE_SHIFT); } static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t dev_addr) { - return (phys_addr_t)dev_addr; + phys_addr_t paddr = (phys_addr_t)dev_addr; + + return paddr + ((phys_addr_t)dev->dma_pfn_offset << PAGE_SHIFT); } static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size) @@ -86,5 +90,14 @@ static inline void dma_mark_clean(void *addr, size_t size) { } +/* Override for dma_max_pfn() */ +static inline unsigned long dma_max_pfn(struct device *dev) +{ + dma_addr_t dma_max = (dma_addr_t)*dev->dma_mask; + + return (ulong)dma_to_phys(dev, dma_max) >> PAGE_SHIFT; +} +#define dma_max_pfn(dev) dma_max_pfn(dev) + #endif /* __KERNEL__ */ #endif /* __ASM_DMA_MAPPING_H */