From patchwork Thu May 19 08:35:36 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 9124881 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 949C0BF29F for ; Thu, 19 May 2016 08:38:10 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id BB2A620219 for ; Thu, 19 May 2016 08:38:09 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E409C20218 for ; Thu, 19 May 2016 08:38:08 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1b3JRg-0003pX-Ve; Thu, 19 May 2016 08:36:40 +0000 Received: from mout.kundenserver.de ([212.227.17.10]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1b3JRd-0003mt-Iz for linux-arm-kernel@lists.infradead.org; Thu, 19 May 2016 08:36:38 +0000 Received: from wuerfel.lan. ([78.42.132.4]) by mrelayeu.kundenserver.de (mreue103) with ESMTPA (Nemesis) id 0M83Dl-1bpUCq2Mtt-00vhx8; Thu, 19 May 2016 10:36:13 +0200 From: Arnd Bergmann To: Vladimir Zapolskiy , Sylvain Lemieux Subject: [PATCH] ARM: lpc32xx: fix NR_IRQS confict Date: Thu, 19 May 2016 10:35:36 +0200 Message-Id: <1463646968-1047336-1-git-send-email-arnd@arndb.de> X-Mailer: git-send-email 2.7.0 X-Provags-ID: V03:K0:pJf2MJOokxxC0CalbxI0qEKPhEFzRKBwy+acfIyBmm76pCSVHRk taVbNkZoL4xFEL6tnjByByAIAG+lCXD5N1Eu/mIIulNRZcpWPjT4BLWOcb29Zynnvn1jYPr 4+BN6kV0bMQfXGZoxQCGZ9MNfVAJalKVL1BIZjhCx9CN/aAo6L5rXHoxMzUXofEimz0oyQa Zgbqyp3DpAuPWGwDmVYOQ== X-UI-Out-Filterresults: notjunk:1; V01:K0:iBwfnM3IclY=:cAwq74EMDSI6OV6jOGGJKN C2aMUO61PoR4DT/IIpDLLrj050qI04X7+FQUVorlxUlYE6tD8bulIk3CmbMWXfhzCsR7/Ypmy spvkODG0gdcinX4k4ectfrr1hlWPEWT7mcbRGWfnJ0gzkhM1Rfl1O6vRVPwTEJrBbNau/dhW7 hqwGELXx+wjPoXQ/rt3oisvc3Z7nzwwv6qi56jpA5nfx8oDDn/qYZgzNK5yzfz0TBHra8STsl nWJk9zmgFILgzfjw+0RLyvanvjDntSlXfiLoCThUGc2tq8AQwnjPHPzTjT1jE6csIWTfELYG1 sNBHjfiiUlBxSM1YJHf9FBbxj4/h5246IRxim6glUFeIpsB63rydzOkCnCc7qHT6YTovaVB4X Q/BPP3DxUjLAgGMdX9GGd2Y5LAPwNQ/xAp8E55K5RxGMWF5EV4XlEtA2j+Q9OQmM3lW1LLBw/ fbaPqI7D3Ge3sO9NmM1sYZ7WED4HDDjvGAXVKypZ2JfKYHTwOcLnn+fqIIHPxc8T7nMe8AAOX hsDRV+8qHvfeqUSnNSPaPxeNRmXy06XSri9cfS8kk3McWtcwjNLKOOXp2Fq329bLFCPsWzSdC N3SSRnE0QWfPHGFWUOXoB0m3M+X4QyfNl/PQ+16ZA/dyIxmUESLpffyfBsOvR1SQx9ZHlVLT/ MJXf/YWoRZxBJfTIZ7keFCQuq8B7ruktxTz/f6RpBcvRJH9pPveckHSsJy+gR9MONnrA= X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160519_013637_993487_7646DFAE X-CRM114-Status: GOOD ( 14.94 ) X-Spam-Score: -1.9 (-) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-kernel@lists.infradead.org, Arnd Bergmann , linux-kernel@vger.kernel.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-5.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP With the change to sparse IRQs, the lpc32xx platform gets a warning about conflicting macros: In file included from arch/arm/mach-lpc32xx/irq.c:31:0: arch/arm/mach-lpc32xx/include/mach/irqs.h:115:0: warning: "NR_IRQS" redefined #define NR_IRQS 96 arch/arm/include/asm/irq.h:9:0: note: this is the location of the previous definition #define NR_IRQS NR_IRQS_LEGACY In the irq controller driver, we surely need the local number instead of the generic NR_IRQS definition, so I'm renaming that one to LPC32XX_NR_IRQS. Signed-off-by: Arnd Bergmann Fixes: 8cb17b5ed017 ("irqchip: Add LPC32xx interrupt controller driver") --- arch/arm/mach-lpc32xx/include/mach/irqs.h | 2 +- arch/arm/mach-lpc32xx/irq.c | 6 +++--- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-lpc32xx/include/mach/irqs.h b/arch/arm/mach-lpc32xx/include/mach/irqs.h index 9e3b90df32e1..00190535df90 100644 --- a/arch/arm/mach-lpc32xx/include/mach/irqs.h +++ b/arch/arm/mach-lpc32xx/include/mach/irqs.h @@ -112,6 +112,6 @@ #define IRQ_LPC32XX_GPI_06 LPC32XX_SIC2_IRQ(28) #define IRQ_LPC32XX_SYSCLK LPC32XX_SIC2_IRQ(31) -#define NR_IRQS 96 +#define LPC32XX_NR_IRQS 96 #endif diff --git a/arch/arm/mach-lpc32xx/irq.c b/arch/arm/mach-lpc32xx/irq.c index 2ae431e8bc1b..e30f5e6b8573 100644 --- a/arch/arm/mach-lpc32xx/irq.c +++ b/arch/arm/mach-lpc32xx/irq.c @@ -81,7 +81,7 @@ struct lpc32xx_event_info { /* * Maps an IRQ number to and event mask and register */ -static const struct lpc32xx_event_info lpc32xx_events[NR_IRQS] = { +static const struct lpc32xx_event_info lpc32xx_events[LPC32XX_NR_IRQS] = { [IRQ_LPC32XX_GPI_08] = { .event_group = &lpc32xx_event_pin_regs, .mask = LPC32XX_CLKPWR_EXTSRC_GPI_08_BIT, @@ -431,7 +431,7 @@ void __init lpc32xx_init_irq(void) LPC32XX_INTC_ACT_TYPE(LPC32XX_SIC2_BASE)); /* Configure supported IRQ's */ - for (i = 0; i < NR_IRQS; i++) { + for (i = 0; i < LPC32XX_NR_IRQS; i++) { irq_set_chip_and_handler(i, &lpc32xx_irq_chip, handle_level_irq); irq_clear_status_flags(i, IRQ_NOREQUEST); @@ -465,7 +465,7 @@ void __init lpc32xx_init_irq(void) of_irq_init(mic_of_match); - lpc32xx_mic_domain = irq_domain_add_legacy(lpc32xx_mic_np, NR_IRQS, + lpc32xx_mic_domain = irq_domain_add_legacy(lpc32xx_mic_np, LPC32XX_NR_IRQS, 0, 0, &irq_domain_simple_ops, NULL); if (!lpc32xx_mic_domain)