From patchwork Tue May 31 11:57:37 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suzuki K Poulose X-Patchwork-Id: 9144607 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id A343B60757 for ; Tue, 31 May 2016 11:59:51 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 95962272D8 for ; Tue, 31 May 2016 11:59:51 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8A8DD27E72; Tue, 31 May 2016 11:59:51 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id A6424272D8 for ; Tue, 31 May 2016 11:59:50 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1b7iJh-0006kS-Qf; Tue, 31 May 2016 11:58:37 +0000 Received: from foss.arm.com ([217.140.101.70]) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1b7iJH-0006So-A5 for linux-arm-kernel@lists.infradead.org; Tue, 31 May 2016 11:58:12 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0B02255A; Tue, 31 May 2016 04:58:23 -0700 (PDT) Received: from e106634-lin.cambridge.arm.com (e106634-lin.cambridge.arm.com [10.1.209.36]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id B34E33F246; Tue, 31 May 2016 04:57:53 -0700 (PDT) From: Suzuki K Poulose To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 4/5] coresight: Add better messages for coresight_timeout Date: Tue, 31 May 2016 12:57:37 +0100 Message-Id: <1464695858-29284-5-git-send-email-suzuki.poulose@arm.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1464695858-29284-1-git-send-email-suzuki.poulose@arm.com> References: <1464695858-29284-1-git-send-email-suzuki.poulose@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160531_045811_436443_770ED656 X-CRM114-Status: UNSURE ( 8.91 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-kernel@vger.kernel.org, mathieu.poirier@linaro.org, Suzuki K Poulose MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP When we encounter a timeout waiting for a status change via coresight_timeout, the caller always print the offset which was tried. This is pretty much useless as it doesn't specify the bit position we wait for. Also, one needs to lookup the TRM to figure out, what was wrong. This patch changes all such error messages to print something more meaningful. Cc: Mathieu Poirier Signed-off-by: Suzuki K Poulose --- drivers/hwtracing/coresight/coresight-etb10.c | 6 ++---- drivers/hwtracing/coresight/coresight-etm4x.c | 6 ++---- drivers/hwtracing/coresight/coresight-tmc.c | 6 ++---- 3 files changed, 6 insertions(+), 12 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etb10.c b/drivers/hwtracing/coresight/coresight-etb10.c index 4d20b0b..6bd4b93 100644 --- a/drivers/hwtracing/coresight/coresight-etb10.c +++ b/drivers/hwtracing/coresight/coresight-etb10.c @@ -184,8 +184,7 @@ static void etb_disable_hw(struct etb_drvdata *drvdata) if (coresight_timeout(drvdata->base, ETB_FFCR, ETB_FFCR_BIT, 0)) { dev_err(drvdata->dev, - "timeout observed when probing at offset %#x\n", - ETB_FFCR); + "timeout while waiting for completion of Manual Flush\n"); } /* disable trace capture */ @@ -193,8 +192,7 @@ static void etb_disable_hw(struct etb_drvdata *drvdata) if (coresight_timeout(drvdata->base, ETB_FFSR, ETB_FFSR_BIT, 1)) { dev_err(drvdata->dev, - "timeout observed when probing at offset %#x\n", - ETB_FFCR); + "timeout while waiting for Formatter to Stop\n"); } CS_LOCK(drvdata->base); diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c index 88947f3..e494042 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x.c +++ b/drivers/hwtracing/coresight/coresight-etm4x.c @@ -111,8 +111,7 @@ static void etm4_enable_hw(void *info) /* wait for TRCSTATR.IDLE to go up */ if (coresight_timeout(drvdata->base, TRCSTATR, TRCSTATR_IDLE_BIT, 1)) dev_err(drvdata->dev, - "timeout observed when probing at offset %#x\n", - TRCSTATR); + "timeout when waiting for Idle Trace Status\n"); writel_relaxed(config->pe_sel, drvdata->base + TRCPROCSELR); writel_relaxed(config->cfg, drvdata->base + TRCCONFIGR); @@ -184,8 +183,7 @@ static void etm4_enable_hw(void *info) /* wait for TRCSTATR.IDLE to go back down to '0' */ if (coresight_timeout(drvdata->base, TRCSTATR, TRCSTATR_IDLE_BIT, 0)) dev_err(drvdata->dev, - "timeout observed when probing at offset %#x\n", - TRCSTATR); + "timeout when waiting for Idle Trace Status\n"); CS_LOCK(drvdata->base); diff --git a/drivers/hwtracing/coresight/coresight-tmc.c b/drivers/hwtracing/coresight/coresight-tmc.c index 9e02ac9..c7d8ba6 100644 --- a/drivers/hwtracing/coresight/coresight-tmc.c +++ b/drivers/hwtracing/coresight/coresight-tmc.c @@ -38,8 +38,7 @@ void tmc_wait_for_tmcready(struct tmc_drvdata *drvdata) if (coresight_timeout(drvdata->base, TMC_STS, TMC_STS_TMCREADY_BIT, 1)) { dev_err(drvdata->dev, - "timeout observed when probing at offset %#x\n", - TMC_STS); + "timeout observed when waiting for TMC to be Ready\n"); } } @@ -56,8 +55,7 @@ void tmc_flush_and_stop(struct tmc_drvdata *drvdata) if (coresight_timeout(drvdata->base, TMC_FFCR, TMC_FFCR_FLUSHMAN_BIT, 0)) { dev_err(drvdata->dev, - "timeout observed when probing at offset %#x\n", - TMC_FFCR); + "timeout observed while waiting for completion of Manual Flush\n"); } tmc_wait_for_tmcready(drvdata);