| Message ID | 1465282546-28256-2-git-send-email-Gang.Liu@nxp.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 06/07/2016 02:06 AM, Liu Gang wrote: > The 'dma-coherent' indicates that the hardware IP block can ensure > the coherency of the data transferred from/to the IP block. This > can avoid the software cache flush/invalid actions, and improve > the performance significantly. > > The PCI IP block of ls1043a has this capability, so adding this > feature to improve the PCI performance. > > Signed-off-by: Liu Gang <Gang.Liu@nxp.com> > --- > arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 3 +++ > 1 file changed, 3 insertions(+) Why not ls2080a as well? What about non-PCI devices? Pretty much everything on these chips should be coherent as long as it's properly configured. -Scott
> From: Scott Wood > > On 06/07/2016 02:06 AM, Liu Gang wrote: > > The 'dma-coherent' indicates that the hardware IP block can ensure the > > coherency of the data transferred from/to the IP block. This can avoid > > the software cache flush/invalid actions, and improve the performance > > significantly. > > > > The PCI IP block of ls1043a has this capability, so adding this > > feature to improve the PCI performance. > > > > Signed-off-by: Liu Gang <Gang.Liu@nxp.com> > > --- > > arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 3 +++ > > 1 file changed, 3 insertions(+) > > Why not ls2080a as well? [Liu Gang] ls2080 should also include this property, we can add it after verification. > What about non-PCI devices? > > Pretty much everything on these chips should be coherent as long as it's > properly configured. [Liu Gang] you are right. For the layerscape platforms including CCI or CCN internal bus, theoretically, pretty much IP blocks (PCI/non-PCI) should be coherent. But this depends on the properly hardware and software configurations. (ls1012a PCI devices cannot implement the coherent duo to hardware issue) So I think we'd better to add this property after each IP block's verification. Thanks! Liu Gang > > -Scott
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi index de0323b..21a30f7 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi @@ -479,6 +479,7 @@ #address-cells = <3>; #size-cells = <2>; device_type = "pci"; + dma-coherent; num-lanes = <4>; bus-range = <0x0 0xff>; ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */ @@ -503,6 +504,7 @@ #address-cells = <3>; #size-cells = <2>; device_type = "pci"; + dma-coherent; num-lanes = <2>; bus-range = <0x0 0xff>; ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */ @@ -527,6 +529,7 @@ #address-cells = <3>; #size-cells = <2>; device_type = "pci"; + dma-coherent; num-lanes = <2>; bus-range = <0x0 0xff>; ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000 /* downstream I/O */
The 'dma-coherent' indicates that the hardware IP block can ensure the coherency of the data transferred from/to the IP block. This can avoid the software cache flush/invalid actions, and improve the performance significantly. The PCI IP block of ls1043a has this capability, so adding this feature to improve the PCI performance. Signed-off-by: Liu Gang <Gang.Liu@nxp.com> --- arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 3 +++ 1 file changed, 3 insertions(+)