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[92.17.247.99]) by smtp.gmail.com with ESMTPSA id g3sm11367210wjb.47.2016.06.10.02.35.05 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 10 Jun 2016 02:35:05 -0700 (PDT) From: Srinivas Kandagatla To: Andy Gross Subject: [PATCH 2/2] ARM: dts: sd_600eval: Fix eMMC lockup issue Date: Fri, 10 Jun 2016 10:34:58 +0100 Message-Id: <1465551298-21457-2-git-send-email-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1465551298-21457-1-git-send-email-srinivas.kandagatla@linaro.org> References: <1465551298-21457-1-git-send-email-srinivas.kandagatla@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160610_023528_012859_BB83F712 X-CRM114-Status: GOOD ( 13.79 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Parth Pancholi , David Brown , Rob Herring , linux-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Parth Pancholi This board locks up if we stress test the eMMC, as the regulator s4 is unable to supply enough current for all the peripherials attached to it. As this supply is wired up to most of the peripherials including DDR, it resulted in such lockup. This patch fixes this issue by setting s4 regulator correctly with Auto power mode. Reported-by: Srinivas Kandagatla [Srinivas Kandagatla: rewrote the change log] Tested-by: Girish Sharma Signed-off-by: Parth Pancholi --- arch/arm/boot/dts/qcom-apq8064-arrow-sd-600eval.dts | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom-apq8064-arrow-sd-600eval.dts b/arch/arm/boot/dts/qcom-apq8064-arrow-sd-600eval.dts index 7df0108..39ae2bc 100644 --- a/arch/arm/boot/dts/qcom-apq8064-arrow-sd-600eval.dts +++ b/arch/arm/boot/dts/qcom-apq8064-arrow-sd-600eval.dts @@ -1,6 +1,7 @@ #include "qcom-apq8064-v2.0.dtsi" #include "qcom-apq8064-arrow-sd-600eval-pins.dtsi" #include +#include / { model = "Arrow Electronics, APQ8064 SD_600eval"; @@ -82,7 +83,8 @@ s4 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; - qcom,switch-mode-frequency = <3200000>; + qcom,switch-mode-frequency = <1600000>; + qcom,force-mode = ; bias-pull-down; regulator-always-on; };