From patchwork Mon Jun 13 09:39:46 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Zhong X-Patchwork-Id: 9172459 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 30B7960573 for ; Mon, 13 Jun 2016 09:43:35 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 20644200E7 for ; Mon, 13 Jun 2016 09:43:35 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 155CA265B9; Mon, 13 Jun 2016 09:43:35 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED, T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 99E58200E7 for ; Mon, 13 Jun 2016 09:43:34 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1bCONj-0004SN-U2; Mon, 13 Jun 2016 09:42:07 +0000 Received: from m50-111.126.com ([123.125.50.111]) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1bCONI-0003oq-R8; Mon, 13 Jun 2016 09:41:42 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=126.com; s=s110527; h=From:Subject:Date:Message-Id; bh=ho8qxBwV5qBBYYHYQe /KRkSqYueqDn+5HHtuym95M6c=; b=FViriHWNt6K905X2GKxJLguSI+OeaxSRn3 Wx0pjW+r3W3uUeoNjbfLD77h0RN2VZAWhZYG2FBIL7YOMjFk3FpN7lS69XeT9iqm zgjng7g0XpfqH/1tTk/erKYu4LKWqdfspSlD23ZJcGzrYw08OEcWpTnlQkDFqUgP F/kN3M+2k= Received: from localhost.localdomain (unknown [103.29.142.67]) by smtp5 (Coremail) with SMTP id jtKowAD3rUtnf15XBVSVAg--.4737S3; Mon, 13 Jun 2016 17:39:59 +0800 (CST) From: Chris Zhong To: dianders@chromium.org, tfiga@chromium.org, heiko@sntech.de, yzq@rock-chips.com, groeck@chromium.org Subject: [v2 PATCH 1/4] Documentation: bindings: add dt doc for Rockchip USB Type-C PHY Date: Mon, 13 Jun 2016 17:39:46 +0800 Message-Id: <1465810789-22303-2-git-send-email-zyw@rock-chips.com> X-Mailer: git-send-email 2.6.3 In-Reply-To: <1465810789-22303-1-git-send-email-zyw@rock-chips.com> References: <1465810789-22303-1-git-send-email-zyw@rock-chips.com> X-CM-TRANSID: jtKowAD3rUtnf15XBVSVAg--.4737S3 X-Coremail-Antispam: 1Uf129KBjvJXoWxCr1UJryUJF4rXr1ktF1xuFg_yoWrXr43p3 ZxCF9xJr18Aa1xWrZ8trn7AFWrAFnxJFZ3G3W7ZFyjq345tr15KasrKrykJFyUGr1kZa1a vay7Ca4Ykw4akr7anT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDUYxBIdaVFxhVjvjDU0xZFpf9x07jqAp8UUUUU= X-Originating-IP: [103.29.142.67] X-CM-SenderInfo: p21zt0rjttqiyswou0bp/1tbiJQ+H5FWflSCEsgAAsA X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160613_024141_517285_BDD3D438 X-CRM114-Status: GOOD ( 10.68 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Pawel Moll , Ian Campbell , linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Rob Herring , Kumar Gala , Chris Zhong , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds a binding that describes the Rockchip USB Type-C PHY for rk3399 Signed-off-by: Chris Zhong --- Changes in v2: - add some registers description Changes in v1: - add extcon node description - move the registers in phy driver - remove the suffix of reset .../devicetree/bindings/phy/phy-rockchip-typec.txt | 77 ++++++++++++++++++++++ 1 file changed, 77 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt b/Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt new file mode 100644 index 0000000..430920c --- /dev/null +++ b/Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt @@ -0,0 +1,77 @@ +* ROCKCHIP type-c PHY +--------------------- + +Required properties: + - compatible : should be "rockchip,rk3399-typec-phy0" or + "rockchip,rk3399-typec-phy1" + - reg: Address and length of the usb phy control register set + - rockchip,grf : phandle to the syscon managing the "general + register files" + - clocks : phandle + clock specifier for the phy clocks + - clock-names : string, clock name, must be "tcpdcore", "tcpdphy_ref"; + - resets : a list of phandle + reset specifier pairs + - reset-names : string reset name, must be: + "tcphy", "tcphy_pipe", "uphy_tcphy" + - #phy-cells : Must be 0. See ./phy-bindings.txt for details. + - extcon : extcon specifier for the Power Delivery + +Note, there are 2 type-c phys for RK3399, and they are almost identical, except +these registers(description below), every register node contains 3 sections: +offset, enable bit, write mask bit. + - rockchip,typec_conn_dir : the register of type-c connector direction, + for type-c phy0, it must be <0xe580 0 16>; + for type-c phy1, it must be <0xe58c 0 16>; + - rockchip,usb3tousb2_en : the register of type-c force usb3 to usb2 enable + control. + for type-c phy0, it must be <0xe580 3 19>; + for type-c phy1, it must be <0xe58c 3 19>; + - rockchip,external_psm : the register of type-c phy external psm clock + selection. + for type-c phy0, it must be <0xe588 14 30>; + for type-c phy1, it must be <0xe594 14 30>; + - rockchip,pipe_status : the register of type-c phy pipe status. + for type-c phy0, it must be <0xe5c0 0 0>; + for type-c phy1, it must be <0xe5c0 16 16>; + - rockchip,uphy_dp_sel : the register of type-c phy selection for DP + for type-c phy0, it must be <0x6268 19 19>; + for type-c phy1, it must be <0x6268 3 19>; + +Example: + tcphy0: phy@ff7c0000 { + compatible = "rockchip,rk3399-typec-phy0"; + reg = <0x0 0xff7c0000 0x0 0x40000>; + #phy-cells = <0>; + extcon = <&fusb1>; + rockchip,grf = <&grf>; + clocks = <&cru SCLK_UPHY0_TCPDCORE>, + <&cru SCLK_UPHY0_TCPDPHY_REF>; + clock-names = "tcpdcore", "tcpdphy_ref"; + resets = <&cru SRST_UPHY0>, + <&cru SRST_UPHY0_PIPE_L00>, + <&cru SRST_P_UPHY0_TCPHY>; + reset-names = "tcphy", "tcphy_pipe", "uphy_tcphy"; + rockchip,typec_conn_dir = <0xe580 0 16>; + rockchip,usb3tousb2_en = <0xe580 3 19>; + rockchip,external_psm = <0xe588 14 30>; + rockchip,pipe_status = <0xe5c0 0 0>; + rockchip,uphy_dp_sel = <0x6268 19 19>; + }; + + tcphy1: phy@ff800000 { + compatible = "rockchip,rk3399-typec-phy1"; + reg = <0x0 0xff800000 0x0 0x40000>; + #phy-cells = <0>; + rockchip,grf = <&grf>; + clocks = <&cru SCLK_UPHY1_TCPDCORE>, + <&cru SCLK_UPHY1_TCPDPHY_REF>; + clock-names = "tcpdcore", "tcpdphy_ref"; + resets = <&cru SRST_UPHY1>, + <&cru SRST_UPHY1_PIPE_L00>, + <&cru SRST_P_UPHY1_TCPHY>; + reset-names = "tcphy", "tcphy_pipe", "uphy_tcphy"; + rockchip,typec_conn_dir = <0xe58c 0 16>; + rockchip,usb3tousb2_en = <0xe58c 3 19>; + rockchip,external_psm = <0xe594 14 30>; + rockchip,pipe_status = <0xe5c0 16 16>; + rockchip,uphy_dp_sel = <0x6268 3 19>; + };