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[73.225.163.254]) by smtp.gmail.com with ESMTPSA id uj5sm56195069pac.28.2016.06.18.17.31.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 18 Jun 2016 17:31:29 -0700 (PDT) From: Andrey Smirnov To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 4/5] i.MX: system.c: Tweak prefetch settings for performance Date: Sat, 18 Jun 2016 17:31:07 -0700 Message-Id: <1466296268-27099-7-git-send-email-andrew.smirnov@gmail.com> X-Mailer: git-send-email 2.5.5 In-Reply-To: <1466296268-27099-1-git-send-email-andrew.smirnov@gmail.com> References: <1466296268-27099-1-git-send-email-andrew.smirnov@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160618_173149_526255_5F61568A X-CRM114-Status: GOOD ( 12.07 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Russell King , Arnd Bergmann , Andrey Smirnov , linux-kernel@vger.kernel.org, Sascha Hauer , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Shawn Guo MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Update Prefetch Control Register settings to match that of Freescale's Linux tree. As the commit e3addf1b773964eac7f797e8538c69481be4279c states (author Nitin Garg): "... set Prefetch offset to 15, since it improves memcpy performance by 35%. Don't enable Incr double Linefill enable since it adversely affects memcpy performance by about 32MB/s and reads by 90MB/s. Tested with 4K to 16MB sized src and dst aligned buffer..." Those results are also corroborated by our own testing. Acked-by: Arnd Bergmann Tested-by: Chris Healy Signed-off-by: Andrey Smirnov --- arch/arm/mach-imx/system.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-imx/system.c b/arch/arm/mach-imx/system.c index 7ba9dc8..d1300b9 100644 --- a/arch/arm/mach-imx/system.c +++ b/arch/arm/mach-imx/system.c @@ -111,8 +111,12 @@ void __init imx_init_l2cache(void) val = readl_relaxed(l2x0_base + L310_PREFETCH_CTRL); val |= L310_PREFETCH_CTRL_DBL_ L310_PREFETCH_CTRL_INSTR_PREFETCH | - L310_PREFETCH_CTRL_DATA_PREFETCH | - L310_PREFETCH_CTRL_DBL_LINEFILL_INCR; + L310_PREFETCH_CTRL_DATA_PREFETCH; + + /* Set perfetch offset to improve performance */ + val &= ~L310_PREFETCH_CTRL_OFFSET_MASK; + val |= 15; + writel_relaxed(val, l2x0_base + L310_PREFETCH_CTRL); }