From patchwork Tue Jun 21 17:11:43 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeremy Linton X-Patchwork-Id: 9191075 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id B12F66075A for ; Tue, 21 Jun 2016 17:15:50 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9B291282ED for ; Tue, 21 Jun 2016 17:15:50 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8F8CE28306; Tue, 21 Jun 2016 17:15:50 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 193C7282ED for ; Tue, 21 Jun 2016 17:15:50 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bFPFX-0005ng-PX; Tue, 21 Jun 2016 17:14:07 +0000 Received: from foss.arm.com ([217.140.101.70]) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bFPE1-0003wG-CF for linux-arm-kernel@lists.infradead.org; Tue, 21 Jun 2016 17:12:38 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A3E10BBB; Tue, 21 Jun 2016 10:12:40 -0700 (PDT) Received: from beelzebub.ast.arm.com (unknown [10.118.96.220]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id BEE053F21A; Tue, 21 Jun 2016 10:11:53 -0700 (PDT) From: Jeremy Linton To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 05/11] arm64: pmu: Add support for probing with ACPI Date: Tue, 21 Jun 2016 12:11:43 -0500 Message-Id: <1466529109-21715-6-git-send-email-jeremy.linton@arm.com> X-Mailer: git-send-email 2.5.5 In-Reply-To: <1466529109-21715-1-git-send-email-jeremy.linton@arm.com> References: <1466529109-21715-1-git-send-email-jeremy.linton@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160621_101233_689216_9B64F432 X-CRM114-Status: GOOD ( 20.74 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, Lorenzo.Pieralisi@arm.com, mlangsdorf@redhat.com, alexander.shishkin@linux.intel.com, catalin.marinas@arm.com, punit.agrawal@arm.com, will.deacon@arm.com, acme@kernel.org, linux-acpi@vger.kernel.org, peterz@infradead.org, mingo@redhat.com, Steve.Capper@arm.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Mark Salter In the case of ACPI, the PMU IRQ information is contained in the MADT table. Also, since the PMU does not exist as a device in the ACPI DSDT table, it is necessary to create a platform device so that the appropriate driver probing is triggered. Signed-off-by: Mark Salter Signed-off-by: Jeremy Linton --- NOTE: Much of the code in pmu_acpi_init() is replaced in patches 0009 and 0010 this set. The later version of the patch cleans up most of the possible style/error handling issues that have been pointed out with this version. arch/arm64/kernel/smp.c | 5 +++ drivers/perf/Kconfig | 4 ++ drivers/perf/Makefile | 1 + drivers/perf/arm_pmu_acpi.c | 100 +++++++++++++++++++++++++++++++++++++++++++ include/linux/perf/arm_pmu.h | 7 +++ 5 files changed, 117 insertions(+) create mode 100644 drivers/perf/arm_pmu_acpi.c diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c index 319f48b..49ec927 100644 --- a/arch/arm64/kernel/smp.c +++ b/arch/arm64/kernel/smp.c @@ -37,6 +37,7 @@ #include #include #include +#include #include #include @@ -541,6 +542,7 @@ acpi_verify_and_map_madt(struct acpi_madt_generic_interrupt *processor) return; } bootcpu_valid = true; + arm_pmu_parse_acpi(0, processor); return; } @@ -561,6 +563,9 @@ acpi_verify_and_map_madt(struct acpi_madt_generic_interrupt *processor) */ acpi_set_mailbox_entry(cpu_count, processor); + /* get PMU irq info */ + arm_pmu_parse_acpi(cpu_count, processor); + early_map_cpu_to_node(cpu_count, acpi_numa_get_nid(cpu_count, hwid)); cpu_count++; diff --git a/drivers/perf/Kconfig b/drivers/perf/Kconfig index 04e2653..818fa3b 100644 --- a/drivers/perf/Kconfig +++ b/drivers/perf/Kconfig @@ -12,4 +12,8 @@ config ARM_PMU Say y if you want to use CPU performance monitors on ARM-based systems. +config ARM_PMU_ACPI + def_bool y + depends on ARM_PMU && ACPI + endmenu diff --git a/drivers/perf/Makefile b/drivers/perf/Makefile index acd2397..fd8090d 100644 --- a/drivers/perf/Makefile +++ b/drivers/perf/Makefile @@ -1 +1,2 @@ obj-$(CONFIG_ARM_PMU) += arm_pmu.o +obj-$(CONFIG_ARM_PMU_ACPI) += arm_pmu_acpi.o diff --git a/drivers/perf/arm_pmu_acpi.c b/drivers/perf/arm_pmu_acpi.c new file mode 100644 index 0000000..a24cdd0 --- /dev/null +++ b/drivers/perf/arm_pmu_acpi.c @@ -0,0 +1,100 @@ +/* + * PMU support + * + * Copyright (C) 2015 Red Hat Inc. + * Author: Mark Salter + * + * This work is licensed under the terms of the GNU GPL, version 2. See + * the COPYING file in the top-level directory. + * + */ + +#include +#include +#include +#include +#include + +struct pmu_irq { + int gsi; + int trigger; +}; + +static struct pmu_irq pmu_irqs[NR_CPUS] __initdata; + +/* + * Called from acpi_map_gic_cpu_interface()'s MADT parsing during boot. + * This routine saves off the GSI's and their trigger state for use when we are + * ready to build the PMU platform device. +*/ +void __init arm_pmu_parse_acpi(int cpu, struct acpi_madt_generic_interrupt *gic) +{ + pmu_irqs[cpu].gsi = gic->performance_interrupt; + if (gic->flags & ACPI_MADT_PERFORMANCE_IRQ_MODE) + pmu_irqs[cpu].trigger = ACPI_EDGE_SENSITIVE; + else + pmu_irqs[cpu].trigger = ACPI_LEVEL_SENSITIVE; +} + +static int __init pmu_acpi_init(void) +{ + struct platform_device *pdev; + struct pmu_irq *pirq = pmu_irqs; + struct resource *res, *r; + int err = -ENOMEM; + int i, count, irq; + + if (acpi_disabled) + return 0; + + /* Must have irq for boot cpu, at least */ + if (pirq->gsi == 0) + return -EINVAL; + + irq = acpi_register_gsi(NULL, pirq->gsi, pirq->trigger, + ACPI_ACTIVE_HIGH); + + if (irq_is_percpu(irq)) + count = 1; + else + for (i = 1, count = 1; i < NR_CPUS; i++) + if (pmu_irqs[i].gsi) + ++count; + + pdev = platform_device_alloc(ARMV8_PMU_PDEV_NAME, -1); + if (!pdev) + goto err_free_gsi; + + res = kcalloc(count, sizeof(*res), GFP_KERNEL); + if (!res) + goto err_free_device; + + for (i = 0, r = res; i < count; i++, pirq++, r++) { + if (i) + irq = acpi_register_gsi(NULL, pirq->gsi, pirq->trigger, + ACPI_ACTIVE_HIGH); + r->start = r->end = irq; + r->flags = IORESOURCE_IRQ; + if (pirq->trigger == ACPI_EDGE_SENSITIVE) + r->flags |= IORESOURCE_IRQ_HIGHEDGE; + else + r->flags |= IORESOURCE_IRQ_HIGHLEVEL; + } + + err = platform_device_add_resources(pdev, res, count); + if (!err) + err = platform_device_add(pdev); + kfree(res); + if (!err) + return 0; + +err_free_device: + platform_device_put(pdev); + +err_free_gsi: + for (i = 0; i < count; i++) + acpi_unregister_gsi(pmu_irqs[i].gsi); + + return err; +} +arch_initcall(pmu_acpi_init); diff --git a/include/linux/perf/arm_pmu.h b/include/linux/perf/arm_pmu.h index 0ef963b..0e86dfb 100644 --- a/include/linux/perf/arm_pmu.h +++ b/include/linux/perf/arm_pmu.h @@ -158,4 +158,11 @@ int arm_pmu_device_probe(struct platform_device *pdev, #endif /* CONFIG_ARM_PMU */ +#ifdef CONFIG_ARM_PMU_ACPI +struct acpi_madt_generic_interrupt; +void arm_pmu_parse_acpi(int cpu, struct acpi_madt_generic_interrupt *gic); +#else +#define arm_pmu_parse_acpi(a, b) do { } while (0) +#endif /* CONFIG_ARM_PMU_ACPI */ + #endif /* __ARM_PMU_H__ */