From patchwork Tue Jun 28 10:30:26 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Lezcano X-Patchwork-Id: 9202625 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 2090860757 for ; Tue, 28 Jun 2016 10:35:14 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 10CDB22B26 for ; Tue, 28 Jun 2016 10:35:14 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 04280285E6; Tue, 28 Jun 2016 10:35:14 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED, T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id B729528568 for ; Tue, 28 Jun 2016 10:35:12 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bHqKx-0006a3-N3; Tue, 28 Jun 2016 10:33:47 +0000 Received: from mail-wm0-x22f.google.com ([2a00:1450:400c:c09::22f]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1bHqKR-0005s2-Ad for linux-arm-kernel@lists.infradead.org; Tue, 28 Jun 2016 10:33:18 +0000 Received: by mail-wm0-x22f.google.com with SMTP id f126so133884656wma.1 for ; Tue, 28 Jun 2016 03:32:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=bRh+m30/f0SfpggpAJQCTuqBy7tUkApbktWWbp8kzj8=; b=UlnFZ0W1vzOiIDxqYEoSWAfXTUZl67ubSXx+ZKdtIcJp0wZoUjC96PCL9DUA2D37hV 47QshUxpsqA9ycpZ8UemwkVrekF2vE1iVtGjgilFoindfs+TFniW+nixxA4jQPq8Eiur e9xHUUXow9ZlM6wD5hLLvaRfZUrvwfad2vg74= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=bRh+m30/f0SfpggpAJQCTuqBy7tUkApbktWWbp8kzj8=; b=ip0MGvM4ZTxxp/8qtO/V/OrqXMEUNRAemsnTLJQC+cI5gcCExtwoeM5uahzefFTcZr /4l9QPhuknkXCZ4QuEm9eXg0cOGh2X3DBgelqAkbqPB8fPBuydAE2Oc+t+4ra1PKh2Nc nh8ofK2cdvqoygCJKhfKCTVFeYBzEKJAZc04/D1i6W/mDlshDYc0+z+7NqBGOemkS54N Jr5YZAdVgUhBic8yzzSxTz4Y3MH20EC+RAsRhp8zcqO67ZHkl2nAZ8gUgfQm+AK5J63v VF4TzaIrUj6oPjNMpCIYdxSvqJt7T5IE4OiBebyqBdRm88TyVSdcwljgAL0CxDfndEVw cCew== X-Gm-Message-State: ALyK8tK0t7MT9RgiM64NsCw7etZDHqfcggwQ52VuH+O3afc3WmGTc0GvdGPEyYZhVPVInSxj X-Received: by 10.194.222.137 with SMTP id qm9mr2588337wjc.80.1467109973499; Tue, 28 Jun 2016 03:32:53 -0700 (PDT) Received: from localhost.localdomain (sju31-1-78-210-255-2.fbx.proxad.net. [78.210.255.2]) by smtp.gmail.com with ESMTPSA id a84sm5377403wma.0.2016.06.28.03.32.52 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 28 Jun 2016 03:32:52 -0700 (PDT) From: Daniel Lezcano To: daniel.lezcano@linaro.org, tglx@linutronix.de Subject: [PATCH 07/92] clocksource/drivers/rockchip: Add support for the rk3399 SoC Date: Tue, 28 Jun 2016 12:30:26 +0200 Message-Id: <1467109911-11060-7-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1467109911-11060-1-git-send-email-daniel.lezcano@linaro.org> References: <577251A4.7030508@linaro.org> <1467109911-11060-1-git-send-email-daniel.lezcano@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160628_033315_692488_928F00E7 X-CRM114-Status: GOOD ( 16.32 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Huang, Tao" , Heiko Stuebner , linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Jianqun Xu , linux-arm-kernel@lists.infradead.org, Caesar Wang MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: "Huang, Tao" The only difference between the rk3399 SoC and the other ones is the control register offset which is different. Add a new field to store the control register address depending on the SoC and use it instead of the + . Signed-off-by: Huang Tao Cc: Daniel Lezcano Cc: Thomas Gleixner Cc: Heiko Stuebner Tested-by: Jianqun Xu Signed-off-by: Caesar Wang Signed-off-by: Daniel Lezcano --- drivers/clocksource/rockchip_timer.c | 31 ++++++++++++++++++++++++++----- 1 file changed, 26 insertions(+), 5 deletions(-) diff --git a/drivers/clocksource/rockchip_timer.c b/drivers/clocksource/rockchip_timer.c index b510863..a3f22b0 100644 --- a/drivers/clocksource/rockchip_timer.c +++ b/drivers/clocksource/rockchip_timer.c @@ -19,7 +19,8 @@ #define TIMER_LOAD_COUNT0 0x00 #define TIMER_LOAD_COUNT1 0x04 -#define TIMER_CONTROL_REG 0x10 +#define TIMER_CONTROL_REG3288 0x10 +#define TIMER_CONTROL_REG3399 0x1c #define TIMER_INT_STATUS 0x18 #define TIMER_DISABLE 0x0 @@ -31,6 +32,7 @@ struct bc_timer { struct clock_event_device ce; void __iomem *base; + void __iomem *ctrl; u32 freq; }; @@ -46,15 +48,20 @@ static inline void __iomem *rk_base(struct clock_event_device *ce) return rk_timer(ce)->base; } +static inline void __iomem *rk_ctrl(struct clock_event_device *ce) +{ + return rk_timer(ce)->ctrl; +} + static inline void rk_timer_disable(struct clock_event_device *ce) { - writel_relaxed(TIMER_DISABLE, rk_base(ce) + TIMER_CONTROL_REG); + writel_relaxed(TIMER_DISABLE, rk_ctrl(ce)); } static inline void rk_timer_enable(struct clock_event_device *ce, u32 flags) { writel_relaxed(TIMER_ENABLE | TIMER_INT_UNMASK | flags, - rk_base(ce) + TIMER_CONTROL_REG); + rk_ctrl(ce)); } static void rk_timer_update_counter(unsigned long cycles, @@ -106,7 +113,7 @@ static irqreturn_t rk_timer_interrupt(int irq, void *dev_id) return IRQ_HANDLED; } -static void __init rk_timer_init(struct device_node *np) +static void __init rk_timer_init(struct device_node *np, u32 ctrl_reg) { struct clock_event_device *ce = &bc_timer.ce; struct clk *timer_clk; @@ -118,6 +125,7 @@ static void __init rk_timer_init(struct device_node *np) pr_err("Failed to get base address for '%s'\n", TIMER_NAME); return; } + bc_timer.ctrl = bc_timer.base + ctrl_reg; pclk = of_clk_get_by_name(np, "pclk"); if (IS_ERR(pclk)) { @@ -180,4 +188,17 @@ out_unmap: iounmap(bc_timer.base); } -CLOCKSOURCE_OF_DECLARE(rk_timer, "rockchip,rk3288-timer", rk_timer_init); +static void __init rk3288_timer_init(struct device_node *np) +{ + rk_timer_init(np, TIMER_CONTROL_REG3288); +} + +static void __init rk3399_timer_init(struct device_node *np) +{ + rk_timer_init(np, TIMER_CONTROL_REG3399); +} + +CLOCKSOURCE_OF_DECLARE(rk3288_timer, "rockchip,rk3288-timer", + rk3288_timer_init); +CLOCKSOURCE_OF_DECLARE(rk3399_timer, "rockchip,rk3399-timer", + rk3399_timer_init);