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Tue, 12 Jul 2016 07:54:50 +0000 Authentication-Results: spf=fail (sender IP is 192.88.168.50) smtp.mailfrom=nxp.com; gmail.com; dkim=none (message not signed) header.d=none; gmail.com; dmarc=fail action=none header.from=nxp.com; Received-SPF: Fail (protection.outlook.com: domain of nxp.com does not designate 192.88.168.50 as permitted sender) receiver=protection.outlook.com; client-ip=192.88.168.50; helo=tx30smr01.am.freescale.net; Received: from tx30smr01.am.freescale.net (192.88.168.50) by BY2FFO11FD010.mail.protection.outlook.com (10.1.14.74) with Microsoft SMTP Server (TLS) id 15.1.523.9 via Frontend Transport; Tue, 12 Jul 2016 07:54:49 +0000 Received: from shlinux2.ap.freescale.net (shlinux2.ap.freescale.net [10.192.224.44]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id u6C7rxtm002725; Tue, 12 Jul 2016 00:54:46 -0700 From: Dong Aisheng To: Subject: [PATCH V2 15/15] mmc: sdhci-esdhc-imx: clear tuning bits during driver probe Date: Tue, 12 Jul 2016 15:46:24 +0800 Message-ID: <1468309584-3591-16-git-send-email-aisheng.dong@nxp.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1468309584-3591-1-git-send-email-aisheng.dong@nxp.com> References: <1468309584-3591-1-git-send-email-aisheng.dong@nxp.com> X-EOPAttributedMessage: 0 X-Matching-Connectors: 131127836893813054; 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Ip=[192.88.168.50]; Helo=[tx30smr01.am.freescale.net] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN1PR0301MB0769 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160712_005512_108575_2107C26B X-CRM114-Status: GOOD ( 12.81 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: aisheng.dong@nxp.com, ulf.hansson@linaro.org, dongas86@gmail.com, chris@printf.net, haibo.chen@nxp.com, adrian.hunter@intel.com, shawnguo@kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The tuning bits like FBCLK_SEL, SMP_CLK_SEL and DLY_CELL which affects timing may have already been set by ROM if booting from SD3.0 mode like SDR104. Let's clear it first during driver probe before doing the new card enumeration to avoid working on the wrong timing. Note that tuning bits are dynamical settings which may need to be kept during MMC_PM_KEEP_POWER suspend, so we did not put them into hwinit function. Signed-off-by: Dong Aisheng Acked-by: Adrian Hunter --- drivers/mmc/host/sdhci-esdhc-imx.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index e5b5d1c3eb01..2bb326bbc34a 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -1224,6 +1224,11 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev) host->mmc->caps |= MMC_CAP_1_8V_DDR; if (!(imx_data->socdata->flags & ESDHC_FLAG_HS200)) host->quirks2 |= SDHCI_QUIRK2_BROKEN_HS200; + + /* clear tuning bits in case ROM has set it already */ + writel(0x0, host->ioaddr + ESDHC_MIX_CTRL); + writel(0x0, host->ioaddr + SDHCI_ACMD12_ERR); + writel(0x0, host->ioaddr + ESDHC_TUNE_CTRL_STATUS); } if (imx_data->socdata->flags & ESDHC_FLAG_MAN_TUNING)