From patchwork Fri Jul 15 12:58:10 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil Kovvuri X-Patchwork-Id: 9232005 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id AC20B60865 for ; Fri, 15 Jul 2016 13:02:15 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9B31B27F86 for ; Fri, 15 Jul 2016 13:02:15 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8FF122832D; Fri, 15 Jul 2016 13:02:15 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.7 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED,FREEMAIL_FROM,RCVD_IN_BL_SPAMCOP_NET,RCVD_IN_DNSWL_MED, T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 405CA27F86 for ; Fri, 15 Jul 2016 13:02:15 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bO2jO-0001hQ-Uy; Fri, 15 Jul 2016 13:00:38 +0000 Received: from mail-pa0-x243.google.com ([2607:f8b0:400e:c03::243]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1bO2iX-0008EX-Mc for linux-arm-kernel@lists.infradead.org; Fri, 15 Jul 2016 12:59:58 +0000 Received: by mail-pa0-x243.google.com with SMTP id dx3so6104838pab.2 for ; Fri, 15 Jul 2016 05:59:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=y4Bu/emrImTcsXJH5LlpOEP8qGt0acgra76mGfksa8I=; b=ZSv1zZl8WuLz+ieMRPb8OLUBghKxO8IJmJPa8RAbuGf8J86h7S2nVNg9eLw6WeQLW6 LGS5+JGEjlhlcYZCFeX2Ir+VFkJII2hgnHqITBHykd826b7fUD9MwuAlTxq4x9teNEn5 2LTIVmjSHqSyMyhVvZbgvZKlR58kjvAuyrPsFzEb6ucO/21Bc70N2J6+ey9+7lWUKdJH QNP62AX1zEF/+EpPQ1eiyu9eTX2iicT6Cc1ucsj1QgaBgPIuKC5yZq62tq81DLjy01Z9 XMjMMIsBgIHI8gptrQ4tNNYEyYQ3/kTe0gUNYkxLWxFuZ0Km7lfkrrClAo8ZRvkrIQQV 3+hA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=y4Bu/emrImTcsXJH5LlpOEP8qGt0acgra76mGfksa8I=; b=dXiy0bbotPxgFnAbJ7Tc4E5ggGs0gDBJIrZLPmToKTxuzzqDcYDBGwO7P4Oqf6d0GR +83YIuoOgU1xhyIdwtPk8PTzuzx6YqeCSXjj5m1RgsTOE+SP5M+dMoh2BblAKQVjpK7I XHUT1TIyu9iIIUiM7TDF/58BKxNVn7NJMb/rKOWpMJ+hkqZPyWaauL8rykBBrUayCCY7 rP5/qosTNDGthO/D3WlDM+IQblmRWmbemKV8of1j/aT2J0eD2MavLKkCtJCZv85WY6af kmH04Fx2sPcgLy0p1dp7D5AMPhnsnt42aGT2KLKUmwdcB6yiCm3+ZsIyEvAUoC+cfdB5 9DdQ== X-Gm-Message-State: ALyK8tJOUArnOOjMaglZt8Bed3+ONFypb8uqhKyjA7COV4ex+7FZgSumoY3DD0uYjPuPzg== X-Received: by 10.67.3.164 with SMTP id bx4mr31917696pad.9.1468587568468; Fri, 15 Jul 2016 05:59:28 -0700 (PDT) Received: from machine421.in.caveonetworks.com ([14.140.2.178]) by smtp.googlemail.com with ESMTPSA id t80sm5365880pfj.38.2016.07.15.05.59.26 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 15 Jul 2016 05:59:27 -0700 (PDT) From: sunil.kovvuri@gmail.com To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 05/15] net: thunderx: Enable CQE_RX desc's extension fields Date: Fri, 15 Jul 2016 18:28:10 +0530 Message-Id: <1468587500-32103-6-git-send-email-sunil.kovvuri@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1468587500-32103-1-git-send-email-sunil.kovvuri@gmail.com> References: <1468587500-32103-1-git-send-email-sunil.kovvuri@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160715_055945_940783_DEA0614F X-CRM114-Status: GOOD ( 13.99 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sunil Goutham MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Sunil Goutham Unlike 88xx, CQE_RX descriptor's tunnelling extension i.e CQE_RX2_S is always enabled on 81xx/83xx and HW does insert these fields into CQE_RX. As a result receive buffer addresses will now be present at 7th word of CQE_RX instead of 6th. Enable CQE_RX2_S on 88xx pass 2.x as well. Signed-off-by: Sunil Goutham --- drivers/net/ethernet/cavium/thunder/nic.h | 9 ++++++++- drivers/net/ethernet/cavium/thunder/nic_main.c | 7 +++++++ drivers/net/ethernet/cavium/thunder/nic_reg.h | 1 + drivers/net/ethernet/cavium/thunder/nicvf_queues.c | 12 +++++++++++- 4 files changed, 27 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/cavium/thunder/nic.h b/drivers/net/ethernet/cavium/thunder/nic.h index 6b0b240..136db2a 100644 --- a/drivers/net/ethernet/cavium/thunder/nic.h +++ b/drivers/net/ethernet/cavium/thunder/nic.h @@ -493,7 +493,14 @@ static inline int nic_get_node_id(struct pci_dev *pdev) static inline bool pass1_silicon(struct pci_dev *pdev) { - return pdev->revision < 8; + return (pdev->revision < 8) && + (pdev->subsystem_device == PCI_SUBSYS_DEVID_88XX_NIC_PF); +} + +static inline bool pass2_silicon(struct pci_dev *pdev) +{ + return (pdev->revision >= 8) && + (pdev->subsystem_device == PCI_SUBSYS_DEVID_88XX_NIC_PF); } int nicvf_set_real_num_queues(struct net_device *netdev, diff --git a/drivers/net/ethernet/cavium/thunder/nic_main.c b/drivers/net/ethernet/cavium/thunder/nic_main.c index 0d81117..3f52b36 100644 --- a/drivers/net/ethernet/cavium/thunder/nic_main.c +++ b/drivers/net/ethernet/cavium/thunder/nic_main.c @@ -799,6 +799,13 @@ static void nic_handle_mbx_intr(struct nicpf *nic, int vf) (mbx.rq.qs_num << NIC_QS_ID_SHIFT) | (mbx.rq.rq_num << NIC_Q_NUM_SHIFT); nic_reg_write(nic, reg_addr, mbx.rq.cfg); + /* Enable CQE_RX2_S extension in CQE_RX descriptor. + * This gets appended by default on 81xx/83xx chips, + * for consistency enabling the same on 88xx pass2 + * where this is introduced. + */ + if (pass2_silicon(nic->pdev)) + nic_reg_write(nic, NIC_PF_RX_CFG, 0x01); break; case NIC_MBOX_MSG_RQ_BP_CFG: reg_addr = NIC_PF_QSET_0_127_RQ_0_7_BP_CFG | diff --git a/drivers/net/ethernet/cavium/thunder/nic_reg.h b/drivers/net/ethernet/cavium/thunder/nic_reg.h index 833cf3d..b4a7953 100644 --- a/drivers/net/ethernet/cavium/thunder/nic_reg.h +++ b/drivers/net/ethernet/cavium/thunder/nic_reg.h @@ -36,6 +36,7 @@ #define NIC_PF_MAILBOX_ENA_W1C (0x0450) #define NIC_PF_MAILBOX_ENA_W1S (0x0470) #define NIC_PF_RX_ETYPE_0_7 (0x0500) +#define NIC_PF_RX_CFG (0x05D0) #define NIC_PF_PKIND_0_15_CFG (0x0600) #define NIC_PF_ECC0_FLIP0 (0x1000) #define NIC_PF_ECC1_FLIP0 (0x1008) diff --git a/drivers/net/ethernet/cavium/thunder/nicvf_queues.c b/drivers/net/ethernet/cavium/thunder/nicvf_queues.c index e521a94..ca223aa 100644 --- a/drivers/net/ethernet/cavium/thunder/nicvf_queues.c +++ b/drivers/net/ethernet/cavium/thunder/nicvf_queues.c @@ -1190,7 +1190,17 @@ struct sk_buff *nicvf_get_rcv_skb(struct nicvf *nic, struct cqe_rx_t *cqe_rx) u64 *rb_ptrs = NULL; rb_lens = (void *)cqe_rx + (3 * sizeof(u64)); - rb_ptrs = (void *)cqe_rx + (6 * sizeof(u64)); + /* Except 88xx pass1 on all other chips CQE_RX2_S is added to + * CQE_RX at word6, hence buffer pointers move by word + * + * Use existing 'hw_tso' flag which will be set for all chips + * except 88xx pass1 instead of a additional cache line + * access (or miss) by using pci dev's revision. + */ + if (!nic->hw_tso) + rb_ptrs = (void *)cqe_rx + (6 * sizeof(u64)); + else + rb_ptrs = (void *)cqe_rx + (7 * sizeof(u64)); netdev_dbg(nic->netdev, "%s rb_cnt %d rb0_ptr %llx rb0_sz %d\n", __func__, cqe_rx->rb_cnt, cqe_rx->rb0_ptr, cqe_rx->rb0_sz);