From patchwork Mon Jul 18 18:39:35 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sinan Kaya X-Patchwork-Id: 9235097 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 1FC4660756 for ; Mon, 18 Jul 2016 18:45:23 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 13B8D205A4 for ; Mon, 18 Jul 2016 18:45:23 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 085D7205B0; Mon, 18 Jul 2016 18:45:23 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id AEC4B205A4 for ; Mon, 18 Jul 2016 18:45:22 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bPDW9-0000uH-KY; Mon, 18 Jul 2016 18:43:49 +0000 Received: from smtp.codeaurora.org ([198.145.29.96]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1bPDTW-0006sG-1b for linux-arm-kernel@lists.infradead.org; Mon, 18 Jul 2016 18:41:12 +0000 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id DD1BA61303; Mon, 18 Jul 2016 18:40:47 +0000 (UTC) Received: from drakthul.qualcomm.com (global_nat1_iad_fw.qualcomm.com [129.46.232.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: okaya@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id E29EC60328; Mon, 18 Jul 2016 18:40:45 +0000 (UTC) From: Sinan Kaya To: dmaengine@vger.kernel.org, timur@codeaurora.org, devicetree@vger.kernel.org, cov@codeaurora.org, vinod.koul@intel.com, jcm@redhat.com Subject: [PATCH 08/10] dmaengine: qcom_hidma: bring out interrupt cause Date: Mon, 18 Jul 2016 14:39:35 -0400 Message-Id: <1468867177-15007-9-git-send-email-okaya@codeaurora.org> X-Mailer: git-send-email 1.8.2.1 In-Reply-To: <1468867177-15007-1-git-send-email-okaya@codeaurora.org> References: <1468867177-15007-1-git-send-email-okaya@codeaurora.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160718_114106_689214_F72B6EA5 X-CRM114-Status: GOOD ( 12.48 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: arnd@arndb.de, eric.auger@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Sinan Kaya , agross@codeaurora.org, Dan Williams , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Bring out the interrupt cause to the top level so that MSI interrupts can be hooked at a later stage. Signed-off-by: Sinan Kaya --- drivers/dma/qcom/hidma_ll.c | 60 ++++++++++++++++++++------------------------- 1 file changed, 27 insertions(+), 33 deletions(-) diff --git a/drivers/dma/qcom/hidma_ll.c b/drivers/dma/qcom/hidma_ll.c index 2753210..eb78952 100644 --- a/drivers/dma/qcom/hidma_ll.c +++ b/drivers/dma/qcom/hidma_ll.c @@ -403,12 +403,18 @@ static void hidma_ll_abort(unsigned long arg) * requests traditionally to the destination, this concept does not apply * here for this HW. */ -irqreturn_t hidma_ll_inthandler(int chirq, void *arg) +static void hidma_ll_int_handler_internal(struct hidma_lldev *lldev, int cause) { - struct hidma_lldev *lldev = arg; - u32 status; - u32 enable; - u32 cause; + if (cause & HIDMA_ERR_INT_MASK) { + dev_err(lldev->dev, "error 0x%x, resetting...\n", + cause); + + /* Clear out pending interrupts */ + writel(cause, lldev->evca + HIDMA_EVCA_IRQ_CLR_REG); + + tasklet_schedule(&lldev->rst_task); + return; + } /* * Fine tuned for this HW... @@ -418,40 +424,28 @@ irqreturn_t hidma_ll_inthandler(int chirq, void *arg) * interrupt delivery guarantees. Do not copy this code blindly and * expect that to work. */ - status = readl_relaxed(lldev->evca + HIDMA_EVCA_IRQ_STAT_REG); - enable = readl_relaxed(lldev->evca + HIDMA_EVCA_IRQ_EN_REG); - cause = status & enable; - - while (cause) { - if (cause & HIDMA_ERR_INT_MASK) { - dev_err(lldev->dev, "error 0x%x, resetting...\n", - cause); - - /* Clear out pending interrupts */ - writel(cause, lldev->evca + HIDMA_EVCA_IRQ_CLR_REG); - - tasklet_schedule(&lldev->rst_task); - goto out; - } - + while (atomic_read(&lldev->pending_tre_count)) { /* * Try to consume as many EVREs as possible. */ - hidma_handle_tre_completion(lldev); + hidma_handle_tre_completion(lldev, 0, 0); + } - /* We consumed TREs or there are pending TREs or EVREs. */ - writel_relaxed(cause, lldev->evca + HIDMA_EVCA_IRQ_CLR_REG); + /* We consumed TREs or there are pending TREs or EVREs. */ + writel_relaxed(cause, lldev->evca + HIDMA_EVCA_IRQ_CLR_REG); +} - /* - * Another interrupt might have arrived while we are - * processing this one. Read the new cause. - */ - status = readl_relaxed(lldev->evca + HIDMA_EVCA_IRQ_STAT_REG); - enable = readl_relaxed(lldev->evca + HIDMA_EVCA_IRQ_EN_REG); - cause = status & enable; - } +irqreturn_t hidma_ll_inthandler(int chirq, void *arg) +{ + struct hidma_lldev *lldev = arg; + u32 status; + u32 enable; + u32 cause; -out: + status = readl_relaxed(lldev->evca + HIDMA_EVCA_IRQ_STAT_REG); + enable = readl_relaxed(lldev->evca + HIDMA_EVCA_IRQ_EN_REG); + cause = status & enable; + hidma_ll_int_handler_internal(lldev, cause); return IRQ_HANDLED; }