From patchwork Mon Aug 1 08:12:20 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 9253875 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 5341060865 for ; Mon, 1 Aug 2016 08:13:21 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 44D3A284A1 for ; Mon, 1 Aug 2016 08:13:21 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 37B70284A4; Mon, 1 Aug 2016 08:13:21 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D5ACB284A1 for ; Mon, 1 Aug 2016 08:13:20 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bU8Js-0004kP-Pr; Mon, 01 Aug 2016 08:11:28 +0000 Received: from conuserg-07.nifty.com ([210.131.2.74]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1bU8Jq-0004dE-6z for linux-arm-kernel@lists.infradead.org; Mon, 01 Aug 2016 08:11:27 +0000 Received: from beagle.diag.org (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-07.nifty.com with ESMTP id u718AZis005452; Mon, 1 Aug 2016 17:10:35 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-07.nifty.com u718AZis005452 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1470039036; bh=1wyW1mgHRdxid0yjjQZmvnbqm/5pa1yJL57JvdfxdP0=; h=From:To:Cc:Subject:Date:From; b=Q/0+bCdxdTeRDSI+whfvk5lZS5ZVNNImccsG2IwqBjlb9fYeKQ3kPFMo+sfLgd/Nd PmiGUnsfxdfnSNvkoOMuBp48mf1fN/Cgo/dCmHkwfeenD5793+Qfy+C4anIRH+my+H fRNnhunxPGzUYHANAW+x2RVEvHofq6AcAQzhoGtMlxhca9qHBwVMCXynlLOxjy9Psw tZC+CEdSEzxXfG4P0mpULK84TRN8hHsQpIk91r52xhvw3hyUhfgiD4qP81xOLfs5I5 VEGnNH4liQ73waO2gpclLkhnhpehXipIAYHPvYmNbTZ2pFJ4A4huSwhd7zgGgZizjv hJrFErz3BoeZw== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: arm@kernel.org Subject: [Urgent PATCH] arm64: dts: uniphier: fix IRQ trigger type of ARMv8 timer Date: Mon, 1 Aug 2016 17:12:20 +0900 Message-Id: <1470039140-3801-1-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 1.9.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160801_011126_616975_1FF7671A X-CRM114-Status: GOOD ( 11.39 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Catalin Marinas , Will Deacon , linux-kernel@vger.kernel.org, Masahiro Yamada , Rob Herring , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Since commit 1e2a7d78499e ("irqdomain: Don't set type when mapping an IRQ"), the interrupt type is strictly checked. Without this patch, this board would not boot any more. Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.txt says that the 3rd cell should be either 1 (edge) or 4 (level) depending on the trigger type. As the CA72 Generic Timer provides active-low interrupts, the value of the 3rd cell should be 4. Signed-off-by: Masahiro Yamada Suggested-by: Marc Zyngier --- Arnd, Olof, I guess you are about to send pull-reqs for v4.8 cycle. Could you include this one in them? After IRQ updates for 4.8 were merged, my board would not boot at all. I consulted experts and looks like my DT was wrong. I could do this after -rc1 is out because it is apparently a bug fix, but in that case the for-next branch in ASOC will be broken for me, which would make bisect-ability difficult for me. arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi index fd1af50..bafbcce 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi @@ -117,10 +117,7 @@ timer { compatible = "arm,armv8-timer"; - interrupts = <1 13 0xf01>, - <1 14 0xf01>, - <1 11 0xf01>, - <1 10 0xf01>; + interrupts = <1 13 4>, <1 14 4>, <1 11 4>, <1 10 4>; }; soc {