| Message ID | 1470816228-8874-2-git-send-email-guodong.xu@linaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
在 2016/8/10 16:03, Guodong Xu 写道: > Add resets property to synopsys-dw-mshc bindings. It is intended to > represent the hardware reset signal present internally in some host > controller IC designs. > > See Documentation/devicetree/bindings/reset/reset.txt for details. > > Signed-off-by: Guodong Xu <guodong.xu@linaro.org> > Acked-by: Rob Herring <robh@kernel.org> > --- > Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt > index 8636f5a..4e00e85 100644 > --- a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt > +++ b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt > @@ -39,6 +39,10 @@ Required Properties: > > Optional properties: > > +* resets: phandle + reset specifier pair, intended to represent hardware > + reset signal present internally in some host controller IC designs. > + See Documentation/devicetree/bindings/reset/reset.txt for details. > + > * clocks: from common clock binding: handle to biu and ciu clocks for the > bus interface unit clock and the card interface unit clock. > > Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
diff --git a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt index 8636f5a..4e00e85 100644 --- a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt +++ b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt @@ -39,6 +39,10 @@ Required Properties: Optional properties: +* resets: phandle + reset specifier pair, intended to represent hardware + reset signal present internally in some host controller IC designs. + See Documentation/devicetree/bindings/reset/reset.txt for details. + * clocks: from common clock binding: handle to biu and ciu clocks for the bus interface unit clock and the card interface unit clock.