From patchwork Fri Aug 12 21:54:51 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Zhong X-Patchwork-Id: 9278047 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 0027A60231 for ; Fri, 12 Aug 2016 21:58:13 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E857728B11 for ; Fri, 12 Aug 2016 21:58:12 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DD18528B24; Fri, 12 Aug 2016 21:58:12 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 7D1D128B11 for ; Fri, 12 Aug 2016 21:58:12 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bYKRd-0007P0-OY; Fri, 12 Aug 2016 21:56:49 +0000 Received: from mail-pf0-f195.google.com ([209.85.192.195]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1bYKQJ-0005hP-7g; Fri, 12 Aug 2016 21:55:30 +0000 Received: by mail-pf0-f195.google.com with SMTP id y134so2075136pfg.3; Fri, 12 Aug 2016 14:55:06 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=2kqZ4Yb2RqcGB5008kvhk+5MQft5EZHtiwnXWS7VTTA=; b=XsV6IhXXRRMQIww9/Wrpy2Pi7qRPuchBkYEB75hkE5dipEGP2epV0wP5ZoA3yVzRV+ ee4cmZJw5ET5m4gPnWVDQ56NhCC702ePzXa2I3FzxVj2bLHK28OGUcj8C+5Lt9y1Kj5v 6wITmYakPJTCrTD8ttUIZMU/8lSmIU/pu1e62Pvpg3k82bzkMeWk/0/hipUux8c+AqLc DwJuxgy3fHMPM9sVmrSn9EFSVcqVKJXHu2PelgyL/MCTh5qEuGJglyBtyF0vp9IJh/Q2 HpTKwhAiXOg0Cw7TPHclKpcg4VN96mrg1Lmc5KY8AL6jGS7Nb5JdtI8mzFGeTqoIozVV DBug== X-Gm-Message-State: AEkoouuwaKHmyvm8NfLfvPNHyb0C5rwZ+x6fJkihm5OuB5Mw+zdZRvWOz6NMYB/HnAOlbA== X-Received: by 10.98.83.70 with SMTP id h67mr30826916pfb.115.1471038906220; Fri, 12 Aug 2016 14:55:06 -0700 (PDT) Received: from user5-HP-Z620-Workstation.corp.google.com ([172.22.52.170]) by smtp.gmail.com with ESMTPSA id m78sm15288016pfj.66.2016.08.12.14.55.04 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 12 Aug 2016 14:55:05 -0700 (PDT) From: Chris Zhong To: dianders@chromium.org, tfiga@chromium.org, heiko@sntech.de, yzq@rock-chips.com, groeck@chromium.org, myungjoo.ham@samsung.com, cw00.choi@samsung.com, wulf@rock-chips.com, marcheu@chromium.org Subject: [PATCH v11 PATCH 4/5] Documentation: bindings: add dt documentation for cdn DP controller Date: Fri, 12 Aug 2016 14:54:51 -0700 Message-Id: <1471038892-28099-5-git-send-email-zyw@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1471038892-28099-1-git-send-email-zyw@rock-chips.com> References: <1471038892-28099-1-git-send-email-zyw@rock-chips.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160812_145527_420173_AE04453C X-CRM114-Status: GOOD ( 13.79 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Pawel Moll , Ian Campbell , linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Rob Herring , Kumar Gala , Chris Zhong , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds a binding that describes the cdn DP controller for rk3399. Signed-off-by: Chris Zhong Acked-by: Rob Herring --- Changes in v11: - refer dp phy Changes in v10: - add pclk_vio_grf clock Changes in v9: - modify the reference phy = <&tcphy0 0>, <&tcphy1 0>; Changes in v8: None Changes in v7: None Changes in v6: - add assigned-clocks and assigned-clock-rates - add power-domains Changes in v5: None Changes in v4: - add a reset node - support 2 phys Changes in v3: - add SoC specific compatible string - remove reg = <1>; Changes in v2: None Changes in v1: - add extcon node description - add #sound-dai-cells description .../bindings/display/rockchip/cdn-dp-rockchip.txt | 74 ++++++++++++++++++++++ 1 file changed, 74 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/rockchip/cdn-dp-rockchip.txt diff --git a/Documentation/devicetree/bindings/display/rockchip/cdn-dp-rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/cdn-dp-rockchip.txt new file mode 100644 index 0000000..d34a56e --- /dev/null +++ b/Documentation/devicetree/bindings/display/rockchip/cdn-dp-rockchip.txt @@ -0,0 +1,74 @@ +Rockchip RK3399 specific extensions to the cdn Display Port +================================ + +Required properties: +- compatible: must be "rockchip,rk3399-cdn-dp" + +- reg: physical base address of the controller and length + +- clocks: from common clock binding: handle to dp clock. + +- clock-names: from common clock binding: + Required elements: "core-clk" "pclk" "spdif" "grf" + +- resets : a list of phandle + reset specifier pairs +- reset-names : string reset name, must be: + "spdif" +- power-domains : power-domain property defined with a phandle + to respective power domain. +- assigned-clocks: main clock, should be <&cru SCLK_DP_CORE> +- assigned-clock-rates : the DP core clk frequency, shall be: 100000000 + +- rockchip,grf: this soc should set GRF regs, so need get grf here. + +- ports: contain a port nodes with endpoint definitions as defined in + Documentation/devicetree/bindings/media/video-interfaces.txt. + contained 2 endpoints, connecting to the output of vop. + +- phys: from general PHY binding: the phandle for the PHY device. + +- extcon: extcon specifier for the Power Delivery + +- #sound-dai-cells = it must be 1 if your system is using 2 DAIs: I2S, SPDIF + +------------------------------------------------------------------------------- + +Example: + cdn_dp: dp@fec00000 { + compatible = "rockchip,rk3399-cdn-dp"; + reg = <0x0 0xfec00000 0x0 0x100000>; + interrupts = ; + clocks = <&cru SCLK_DP_CORE>, <&cru PCLK_DP_CTRL>, + <&cru SCLK_SPDIF_REC_DPTX>, <&cru PCLK_VIO_GRF>; + clock-names = "core-clk", "pclk", "spdif", "grf"; + assigned-clocks = <&cru SCLK_DP_CORE>; + assigned-clock-rates = <100000000>; + power-domains = <&power RK3399_PD_HDCP>; + phys = <&tcphy0_dp>, <&tcphy1_dp>; + resets = <&cru SRST_DPTX_SPDIF_REC>; + reset-names = "spdif"; + extcon = <&fusb0>, <&fusb1>; + rockchip,grf = <&grf>; + #address-cells = <1>; + #size-cells = <0>; + #sound-dai-cells = <1>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + dp_in: port { + #address-cells = <1>; + #size-cells = <0>; + dp_in_vopb: endpoint@0 { + reg = <0>; + remote-endpoint = <&vopb_out_dp>; + }; + + dp_in_vopl: endpoint@1 { + reg = <1>; + remote-endpoint = <&vopl_out_dp>; + }; + }; + }; + };