From patchwork Mon Sep 5 18:17:15 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Caesar Wang X-Patchwork-Id: 9314985 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id E48E9600CA for ; Mon, 5 Sep 2016 18:19:30 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D8B2728A35 for ; Mon, 5 Sep 2016 18:19:30 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CCFE528AF0; Mon, 5 Sep 2016 18:19:30 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 5FE2728B06 for ; Mon, 5 Sep 2016 18:19:30 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bgyT8-0006JA-QZ; Mon, 05 Sep 2016 18:18:06 +0000 Received: from mail-pf0-f196.google.com ([209.85.192.196]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1bgySk-0006DW-RT; Mon, 05 Sep 2016 18:17:44 +0000 Received: by mail-pf0-f196.google.com with SMTP id i6so10122727pfe.0; Mon, 05 Sep 2016 11:17:24 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=T5d5YPk6iiEYYItPzSPb5XHWxKOuzHBReugcYdRFf0k=; b=TRU4Y0SWtZbZAnr0A5uAJzhriHA9HfxZ+HMAWHAtSgFB96eutSmDZlMPfVJEEBT7kn jhfP5BbQzRSQjI2SbpReIq/vY3AWaNGsI1cNN0mm82vJ9s3d3gkqo9LbuDkaEQ1xa4s9 gTBr7BSUr8PM6e4eapeVV0KBU2hHSYe+aMpX9tbp20JbPTz+TCRWr8wMWjqh9FqC/PSg q6fkbJVNopqb1qsIneGauvPQHG0i0C48Y9jWKPi3Rwin2E75qFJT+YHc+ub6Fc+qHoui vP+6KvOK0WsnzRuRfTv39uan4YymJa1srsk3TxnetMCNZPfZxVkTacKDOZrx10miEWAv D+DQ== X-Gm-Message-State: AE9vXwMPu9+shxK8EtTnC8ibdw9b33PY+oeAUOve1zAyxffNERFxIOpAB06l6S2o7nVtTw== X-Received: by 10.98.67.193 with SMTP id l62mr65989274pfi.16.1473099444453; Mon, 05 Sep 2016 11:17:24 -0700 (PDT) Received: from nb.corp.google.com ([172.22.52.177]) by smtp.gmail.com with ESMTPSA id d200sm19827591pfd.3.2016.09.05.11.17.23 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 05 Sep 2016 11:17:23 -0700 (PDT) From: Caesar Wang To: Heiko Stuebner Subject: [PATCH v3 2/2] arm64: dts: rockchip: support the pmu node for rk3399 Date: Tue, 6 Sep 2016 02:17:15 +0800 Message-Id: <1473099435-28198-3-git-send-email-wxt@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1473099435-28198-1-git-send-email-wxt@rock-chips.com> References: <1473099435-28198-1-git-send-email-wxt@rock-chips.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160905_111743_004190_F57CE1BD X-CRM114-Status: GOOD ( 10.11 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Brian Norris , Catalin Marinas , Xing Zheng , Marc Zyngier , Jianqun Xu , Shawn Lin , Elaine Zhang , Will Deacon , Douglas Anderson , linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Rob Herring , David Wu , sonnyrao@chromium.org, linux-arm-kernel@lists.infradead.org, Caesar Wang MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds to enable the ARM Performance Monitor Units for rk3399. ARM cores often have a PMU for counting cpu and cache events like cache misses and hits. Also, as the Marc posted the patches [0] to support Partitioning per-cpu interrupts. Let's add this patch to match it on rk3399 SoCs. [0]: https://lkml.org/lkml/2016/4/11/182 Signed-off-by: Caesar Wang Acked-by: Mark Rutland Cc: Heiko Stuebner Cc: Marc Zyngier CC: linux-arm-kernel@lists.infradead.org --- Changes in v3: - updated on next kernel(20160905). - add the Mark's ACK for PATCH[2/2]. Changes in v2: - AS Mark comments on https://patchwork.kernel.org/patch/9209369/ remove the interrupt-affinity property, we need depend on Marc' perf code on https://patchwork.kernel.org/patch/9209369/. arch/arm64/boot/dts/rockchip/rk3399.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index e9e22fe..4e65f3b 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -166,6 +166,16 @@ ; }; + pmu_a53 { + compatible = "arm,cortex-a53-pmu"; + interrupts = ; + }; + + pmu_a72 { + compatible = "arm,cortex-a72-pmu"; + interrupts = ; + }; + xin24m: xin24m { compatible = "fixed-clock"; clock-frequency = <24000000>; @@ -354,6 +364,16 @@ status = "disabled"; }; + ppi-partitions { + part0: interrupt-partition-0 { + affinity = <&cpu_l0 &cpu_l1 &cpu_l2 &cpu_l3>; + }; + + part1: interrupt-partition-1 { + affinity = <&cpu_b0 &cpu_b1>; + }; + }; + i2c1: i2c@ff110000 { compatible = "rockchip,rk3399-i2c"; reg = <0x0 0xff110000 0x0 0x1000>;