From patchwork Sat Sep 10 12:22:18 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vijay Kilari X-Patchwork-Id: 9324975 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 826F860231 for ; Sat, 10 Sep 2016 12:41:05 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 66B8029994 for ; Sat, 10 Sep 2016 12:41:05 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 47155299B6; Sat, 10 Sep 2016 12:41:05 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.7 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RCVD_IN_SORBS_SPAM, T_DKIM_INVALID autolearn=no version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id A68C029994 for ; Sat, 10 Sep 2016 12:41:04 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bihKb-00041l-Px; Sat, 10 Sep 2016 12:24:25 +0000 Received: from mail-pa0-x243.google.com ([2607:f8b0:400e:c03::243]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1bihJS-0003TQ-MV for linux-arm-kernel@lists.infradead.org; Sat, 10 Sep 2016 12:23:18 +0000 Received: by mail-pa0-x243.google.com with SMTP id pp5so5171682pac.2 for ; Sat, 10 Sep 2016 05:22:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=n2fPLdtjkPiMmEnjtpKt7JCXEcPyowZk2QrXWKtm8zU=; b=bPh77YrJ+A5oqdjeg+kZE1GGfplR5t/X5lETwTIYCZzt2kgqO79fP8VdgSj/0cUZna 8B0f4jZX4mhjRc5nCUIqHc3D5e/avEPzOlQjx/Gz3G4j4MI9gnvrzkphCjryvqX+wX6i 7A1toxhU5V5s66T7RCjoVdIg4MzWVQ1iiEDXoUg2JSEuiesAKRi0kVChXE4fAm8smNXQ Zu/dMaiXgxaOM2SIsWub8Xdty7STyCSDNUhalU4u9wCFh4XYbeCduvyWDI+7LBP8MRxd ezSkC45QP7bxHiMDoLkbYv1isosFhJyBJ6USm2eSY8eSYwCvo5uRDYozx3e2QbbeaThC klVw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=n2fPLdtjkPiMmEnjtpKt7JCXEcPyowZk2QrXWKtm8zU=; b=izYkHB7aD//hOSmBFlqT8bGKd6olQjc+tfvoa2Fq3B+8ESzNaFJS+a56nzMap9v9wy +t1PepMrAsLv8YHku7Gw1Uv4rgzYygFnFNRls/+yJevv1h5O5B7g6eZJR7quM0SQoAjn 1vzZ/pfYTbzAqObteTaEtjtnSLLFfDEvpF+2x3XHg6ef83wJSjJp2CQQuR6SPFp3WgJ1 BKiQiRIpBt2DBw+TrK7E0t9s6eHnh9Kb336cPvtv8SaRoJzDId/0lZ+Zfyt/7C4PhD70 1Vc0Qb4MRRWaKOtZAmLweU0jsfVJxhd7eFHhSWZkEi1jzCvpe7/0ZXENuQq3bb8EHNwj Bbrw== X-Gm-Message-State: AE9vXwPlIyU+99Bgd4LN2rpiNeasjPU7UCs++PfzLtc4LQDTyAdUrjcod38gzgRiWXKK3Q== X-Received: by 10.66.0.226 with SMTP id 2mr15437043pah.35.1473510173801; Sat, 10 Sep 2016 05:22:53 -0700 (PDT) Received: from localhost.localdomain ([14.140.2.178]) by smtp.gmail.com with ESMTPSA id tj5sm12042518pab.37.2016.09.10.05.22.49 (version=TLS1_1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 10 Sep 2016 05:22:53 -0700 (PDT) From: vijay.kilari@gmail.com To: marc.zyngier@arm.com, christoffer.dall@linaro.org, peter.maydell@linaro.org Subject: [PATCH 5/5] arm/arm64: vgic-new: Implement KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO ioctl Date: Sat, 10 Sep 2016 17:52:18 +0530 Message-Id: <1473510138-4719-6-git-send-email-vijay.kilari@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1473510138-4719-1-git-send-email-vijay.kilari@gmail.com> References: <1473510138-4719-1-git-send-email-vijay.kilari@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160910_052314_940543_D0039DFF X-CRM114-Status: GOOD ( 16.14 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: vijay.kilari@gmail.com, p.fedin@samsung.com, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, Vijaya Kumar K MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Vijaya Kumar K Userspace requires to store and restore of line_level for level triggered interrupts using ioctl KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO. Signed-off-by: Vijaya Kumar K --- arch/arm64/include/uapi/asm/kvm.h | 6 +++++ virt/kvm/arm/vgic/vgic-kvm-device.c | 48 ++++++++++++++++++++++++++++++++++++- virt/kvm/arm/vgic/vgic-mmio-v3.c | 11 +++++++++ virt/kvm/arm/vgic/vgic-mmio.c | 29 ++++++++++++++++++++++ virt/kvm/arm/vgic/vgic-mmio.h | 5 ++++ virt/kvm/arm/vgic/vgic.h | 3 +++ 6 files changed, 101 insertions(+), 1 deletion(-) diff --git a/arch/arm64/include/uapi/asm/kvm.h b/arch/arm64/include/uapi/asm/kvm.h index 91c7137..4100f8c 100644 --- a/arch/arm64/include/uapi/asm/kvm.h +++ b/arch/arm64/include/uapi/asm/kvm.h @@ -211,6 +211,12 @@ struct kvm_arch_memory_slot { #define KVM_DEV_ARM_VGIC_GRP_CTRL 4 #define KVM_DEV_ARM_VGIC_GRP_REDIST_REGS 5 #define KVM_DEV_ARM_VGIC_CPU_SYSREGS 6 +#define KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO 7 +#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT 10 +#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_MASK \ + (0x3fffffULL << KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT) +#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INTID_MASK 0x3ff +#define VGIC_LEVEL_INFO_LINE_LEVEL 0 #define KVM_DEV_ARM_VGIC_CTRL_INIT 0 diff --git a/virt/kvm/arm/vgic/vgic-kvm-device.c b/virt/kvm/arm/vgic/vgic-kvm-device.c index e580b6d..41de527 100644 --- a/virt/kvm/arm/vgic/vgic-kvm-device.c +++ b/virt/kvm/arm/vgic/vgic-kvm-device.c @@ -517,6 +517,23 @@ static int vgic_attr_regs_access_v3(struct kvm_device *dev, regid, reg); break; } + case KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO: { + unsigned int info, intid; + + info = (attr->attr & KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_MASK) >> + KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT; + if (info == VGIC_LEVEL_INFO_LINE_LEVEL) { + intid = attr->attr & + KVM_DEV_ARM_VGIC_LINE_LEVEL_INTID_MASK; + ret = vgic_v3_line_level_info_uaccess(vcpu, is_write, + intid, &tmp32); + if (!is_write) + *reg = tmp32; + } else { + ret = -EINVAL; + } + break; + } default: ret = -EINVAL; break; @@ -559,6 +576,17 @@ static int vgic_v3_set_attr(struct kvm_device *dev, return vgic_attr_regs_access_v3(dev, attr, ®, true); } + case KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO: { + u32 __user *uaddr = (u32 __user *)(long)attr->addr; + u64 reg; + u32 tmp32; + + if (get_user(tmp32, uaddr)) + return -EFAULT; + + reg = tmp32; + return vgic_attr_regs_access_v3(dev, attr, ®, true); + } } return -ENXIO; } @@ -595,8 +623,18 @@ static int vgic_v3_get_attr(struct kvm_device *dev, return ret; return put_user(reg, uaddr); } - } + case KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO: { + u32 __user *uaddr = (u32 __user *)(long)attr->addr; + u64 reg; + u32 tmp32; + ret = vgic_attr_regs_access_v3(dev, attr, ®, false); + if (ret) + return ret; + tmp32 = reg; + return put_user(tmp32, uaddr); + } + } return -ENXIO; } @@ -617,11 +655,19 @@ static int vgic_v3_has_attr(struct kvm_device *dev, return vgic_v3_has_attr_regs(dev, attr); case KVM_DEV_ARM_VGIC_GRP_NR_IRQS: return 0; + case KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO: { + if (((attr->attr & KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_MASK) >> + KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT) == + VGIC_LEVEL_INFO_LINE_LEVEL) + return 0; + break; + } case KVM_DEV_ARM_VGIC_GRP_CTRL: switch (attr->attr) { case KVM_DEV_ARM_VGIC_CTRL_INIT: return 0; } + break; } return -ENXIO; } diff --git a/virt/kvm/arm/vgic/vgic-mmio-v3.c b/virt/kvm/arm/vgic/vgic-mmio-v3.c index 04e0f2c..826c618 100644 --- a/virt/kvm/arm/vgic/vgic-mmio-v3.c +++ b/virt/kvm/arm/vgic/vgic-mmio-v3.c @@ -748,3 +748,14 @@ int vgic_v3_redist_uaccess(struct kvm_vcpu *vcpu, bool is_write, return vgic_uaccess(vcpu, &rd_dev, is_write, offset, val); } + +int vgic_v3_line_level_info_uaccess(struct kvm_vcpu *vcpu, bool is_write, + u32 intid, u32 *val) +{ + if (is_write) + vgic_write_irq_line_level_info(vcpu, intid, *val); + else + *val = vgic_read_irq_line_level_info(vcpu, intid); + + return 0; +} diff --git a/virt/kvm/arm/vgic/vgic-mmio.c b/virt/kvm/arm/vgic/vgic-mmio.c index 81d851c..9cc3900 100644 --- a/virt/kvm/arm/vgic/vgic-mmio.c +++ b/virt/kvm/arm/vgic/vgic-mmio.c @@ -425,6 +425,35 @@ void vgic_mmio_write_config(struct kvm_vcpu *vcpu, } } +unsigned long vgic_read_irq_line_level_info(struct kvm_vcpu *vcpu, u32 intid) +{ + int i; + unsigned long val = 0; + + for (i = 0; i < 32; i++) { + struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); + + if (irq->line_level) + val |= (1U << i); + } + + return val; +} + +void vgic_write_irq_line_level_info(struct kvm_vcpu *vcpu, u32 intid, + const unsigned long val) +{ + int i; + + for_each_set_bit(i, &val, 32) { + struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); + + spin_lock(&irq->irq_lock); + irq->line_level = true; + spin_unlock(&irq->irq_lock); + } +} + static int match_region(const void *key, const void *elt) { const unsigned int offset = (unsigned long)key; diff --git a/virt/kvm/arm/vgic/vgic-mmio.h b/virt/kvm/arm/vgic/vgic-mmio.h index 9a0109b..83bf9f1 100644 --- a/virt/kvm/arm/vgic/vgic-mmio.h +++ b/virt/kvm/arm/vgic/vgic-mmio.h @@ -188,6 +188,11 @@ int vgic_validate_mmio_region_addr(struct kvm_device *dev, const struct vgic_register_region *regions, int nr_regions, gpa_t addr); +unsigned long vgic_read_irq_line_level_info(struct kvm_vcpu *vcpu, u32 intid); + +void vgic_write_irq_line_level_info(struct kvm_vcpu *vcpu, u32 intid, + const unsigned long val); + unsigned int vgic_v2_init_dist_iodev(struct vgic_io_device *dev); unsigned int vgic_v3_init_dist_iodev(struct vgic_io_device *dev); diff --git a/virt/kvm/arm/vgic/vgic.h b/virt/kvm/arm/vgic/vgic.h index 04a397c..52f4f71 100644 --- a/virt/kvm/arm/vgic/vgic.h +++ b/virt/kvm/arm/vgic/vgic.h @@ -107,6 +107,9 @@ int vgic_v3_cpu_sysregs_uaccess(struct kvm_vcpu *vcpu, bool is_write, u64 id, u64 *val); int vgic_v3_has_cpu_sysregs_attr(struct kvm_vcpu *vcpu, bool is_write, u64 id, u64 *reg); +int vgic_v3_line_level_info_uaccess(struct kvm_vcpu *vcpu, bool is_write, + u32 intid, u32 *val); + #else static inline void vgic_v3_process_maintenance(struct kvm_vcpu *vcpu) {