From patchwork Mon Sep 12 08:22:52 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gerd Hoffmann X-Patchwork-Id: 9325929 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 4ABE4607FD for ; Mon, 12 Sep 2016 08:27:07 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3C6FD28899 for ; Mon, 12 Sep 2016 08:27:07 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3131F288BA; Mon, 12 Sep 2016 08:27:07 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 965F128899 for ; Mon, 12 Sep 2016 08:27:06 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bjMYj-0004Ic-Jq; Mon, 12 Sep 2016 08:25:45 +0000 Received: from mx1.redhat.com ([209.132.183.28]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1bjMWb-0001h3-EF; Mon, 12 Sep 2016 08:23:39 +0000 Received: from int-mx14.intmail.prod.int.phx2.redhat.com (int-mx14.intmail.prod.int.phx2.redhat.com [10.5.11.27]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 2F38112B3B; Mon, 12 Sep 2016 08:23:12 +0000 (UTC) Received: from nilsson.home.kraxel.org (ovpn-116-24.ams2.redhat.com [10.36.116.24]) by int-mx14.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id u8C8NAW8021860; Mon, 12 Sep 2016 04:23:10 -0400 Received: by nilsson.home.kraxel.org (Postfix, from userid 500) id 8772D808AB; Mon, 12 Sep 2016 10:23:09 +0200 (CEST) From: Gerd Hoffmann To: linux-rpi-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 2/6] ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node. Date: Mon, 12 Sep 2016 10:22:52 +0200 Message-Id: <1473668576-22256-3-git-send-email-kraxel@redhat.com> In-Reply-To: <1473668576-22256-1-git-send-email-kraxel@redhat.com> References: <1473668576-22256-1-git-send-email-kraxel@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.27 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.30]); Mon, 12 Sep 2016 08:23:12 +0000 (UTC) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160912_012333_708810_31180648 X-CRM114-Status: GOOD ( 13.30 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Florian Fainelli , Scott Branden , swarren@wwwdotorg.org, Ray Jui , Russell King , open list , eric@anholt.net, Rob Herring , bcm-kernel-feedback-list@broadcom.com, Gerd Hoffmann MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Eric Anholt The BCM2835-ARM-Peripherals.pdf documentation specifies what the function selects do for the pins, and there are a bunch of obvious groupings to be made. With these created, we'll be able to replace bcm2835-rpi.dtsi's main "set all of these pins to alt0" with references to specific groups we want enabled. Signed-off-by: Eric Anholt squashed in: ARM: dts: bcm283x: Add the emmc pin group to bcm283x.dtsi. ARM: dts: bcm283x: Add a group for mapping pins 48-53 to sdhost. ARM: dts: bcm283x: Add a new EMMC pin group from the downstream tree. fixups by kraxel: * fix spi0 name * sort & group entries * use pull defines * add dpi group Signed-off-by: Gerd Hoffmann --- arch/arm/boot/dts/bcm283x.dtsi | 203 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 203 insertions(+) diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi index 4d9f3ab..7b03b63 100644 --- a/arch/arm/boot/dts/bcm283x.dtsi +++ b/arch/arm/boot/dts/bcm283x.dtsi @@ -131,6 +131,209 @@ interrupt-controller; #interrupt-cells = <2>; + + /* Defines pin muxing groups according to + * BCM2835-ARM-Peripherals.pdf page 102. + * + * While each pin can have its mux selected + * for various functions individually, some + * groups only make sense to switch to a + * particular function together. + */ + dpi_gpio4: dpi_gpio4 { + brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11 + 12 13 14 15 16 17 18 19 + 20 21 22 23 24 25 26 27>; + brcm,function = ; + }; + emmc_gpio22: emmc_gpio22 { + brcm,pins = <22 23 24 25 26 27>; + brcm,function = ; + }; + emmc_gpio34: emmc_gpio34 { + brcm,pins = <34 35 36 37 38 39>; + brcm,function = ; + brcm,pull = ; + }; + emmc_gpio48: emmc_gpio48 { + brcm,pins = <48 49 50 51 52 53>; + brcm,function = ; + }; + + gpclk0_gpio4: gpclk0_gpio4 { + brcm,pins = <4>; + brcm,function = ; + }; + gpclk1_gpio5: gpclk1_gpio5 { + brcm,pins = <5>; + brcm,function = ; + }; + gpclk1_gpio42: gpclk1_gpio42 { + brcm,pins = <42>; + brcm,function = ; + }; + gpclk1_gpio44: gpclk1_gpio44 { + brcm,pins = <44>; + brcm,function = ; + }; + gpclk2_gpio6: gpclk2_gpio6 { + brcm,pins = <6>; + brcm,function = ; + }; + gpclk2_gpio43: gpclk2_gpio43 { + brcm,pins = <43>; + brcm,function = ; + }; + + i2c0_gpio0: i2c0_gpio0 { + brcm,pins = <0 1>; + brcm,function = ; + }; + i2c0_gpio32: i2c0_gpio32 { + brcm,pins = <32 34>; + brcm,function = ; + }; + i2c0_gpio44: i2c0_gpio44 { + brcm,pins = <44 45>; + brcm,function = ; + }; + i2c1_gpio2: i2c1_gpio2 { + brcm,pins = <2 3>; + brcm,function = ; + }; + i2c1_gpio44: i2c1_gpio44 { + brcm,pins = <44 45>; + brcm,function = ; + }; + i2c_slave_gpio18: i2c_slave_gpio18 { + brcm,pins = <18 19 20 21>; + brcm,function = ; + }; + + jtag_gpio4: jtag_gpio4 { + brcm,pins = <4 5 6 12 13>; + brcm,function = ; + }; + jtag_gpio22: jtag_gpio22 { + brcm,pins = <22 23 24 25 26 27>; + brcm,function = ; + }; + + pcm_gpio18: pcm_gpio18 { + brcm,pins = <18 19 20 21>; + brcm,function = ; + }; + pcm_gpio28: pcm_gpio28 { + brcm,pins = <28 29 30 31>; + brcm,function = ; + }; + + pwm0_gpio12: pwm0_gpio12 { + brcm,pins = <12>; + brcm,function = ; + }; + pwm0_gpio18: pwm0_gpio18 { + brcm,pins = <18>; + brcm,function = ; + }; + pwm0_gpio40: pwm0_gpio40 { + brcm,pins = <40>; + brcm,function = ; + }; + pwm1_gpio13: pwm1_gpio13 { + brcm,pins = <13>; + brcm,function = ; + }; + pwm1_gpio19: pwm1_gpio19 { + brcm,pins = <19>; + brcm,function = ; + }; + pwm1_gpio41: pwm1_gpio41 { + brcm,pins = <41>; + brcm,function = ; + }; + pwm1_gpio45: pwm1_gpio45 { + brcm,pins = <45>; + brcm,function = ; + }; + + sdhost_gpio48: sdhost_gpio48 { + brcm,pins = <48 49 50 51 52 53>; + brcm,function = ; + }; + + spi0_gpio7: spi0_gpio7 { + brcm,pins = <7 8 9 10 11>; + brcm,function = ; + }; + spi0_gpio35: spi0_gpio35 { + brcm,pins = <35 36 37 38 39>; + brcm,function = ; + }; + spi1_gpio16: spi1_gpio16 { + brcm,pins = <16 17 18 19 20 21>; + brcm,function = ; + }; + spi2_gpio40: spi2_gpio40 { + brcm,pins = <40 41 42 43 44 45>; + brcm,function = ; + }; + + uart0_gpio14: uart0_gpio14 { + brcm,pins = <14 15>; + brcm,function = ; + }; + /* Separate from the uart0_gpio14 group + * because it conflicts with spi1_gpio16, and + * people often run uart0 on the two pins + * without flow contrl. + */ + uart0_ctsrts_gpio16: uart0_ctsrts_gpio16 { + brcm,pins = <16 17>; + brcm,function = ; + }; + uart0_gpio30: uart0_gpio30 { + brcm,pins = <30 31>; + brcm,function = ; + }; + uart0_ctsrts_gpio32: uart0_ctsrts_gpio32 { + brcm,pins = <32 33>; + brcm,function = ; + }; + + uart1_gpio14: uart1_gpio14 { + brcm,pins = <14 15>; + brcm,function = ; + }; + uart1_ctsrts_gpio16: uart1_ctsrts_gpio16 { + brcm,pins = <16 17>; + brcm,function = ; + }; + uart1_gpio32: uart1_gpio32 { + brcm,pins = <32 33>; + brcm,function = ; + }; + uart1_ctsrts_gpio30: uart1_ctsrts_gpio30 { + brcm,pins = <30 31>; + brcm,function = ; + }; + uart1_gpio36: uart1_gpio36 { + brcm,pins = <36 37 38 39>; + brcm,function = ; + }; + uart1_gpio40: uart1_gpio40 { + brcm,pins = <40 41>; + brcm,function = ; + }; + uart1_ctsrts_gpio42: uart1_ctsrts_gpio42 { + brcm,pins = <42 43>; + brcm,function = ; + }; }; uart0: serial@7e201000 {