From patchwork Tue Sep 13 15:12:22 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 9329297 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 9C8A6607FD for ; Tue, 13 Sep 2016 15:15:19 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8CB9D28736 for ; Tue, 13 Sep 2016 15:15:19 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 809D72953A; Tue, 13 Sep 2016 15:15:19 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED, T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id EE295294CF for ; Tue, 13 Sep 2016 15:15:15 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bjpP9-0002Oj-AZ; Tue, 13 Sep 2016 15:13:47 +0000 Received: from mail-wm0-x22a.google.com ([2a00:1450:400c:c09::22a]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1bjpOp-0002J7-UC for linux-arm-kernel@lists.infradead.org; Tue, 13 Sep 2016 15:13:32 +0000 Received: by mail-wm0-x22a.google.com with SMTP id 1so207063763wmz.1 for ; Tue, 13 Sep 2016 08:13:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to; bh=PlV5dKQ/n0l45uF01oCoe9fR+JFqw8N7I1BZiUgGYts=; b=gpazB5L1RJxmH9dn6qKdFNfK/rvTkUHEfKnP6EL7LPaFV2BDzQbt4zP5Ai+ZURK0qu y7eOqtC+fRLCx6p/1LLZrt7BYKX1bO1At6G3pSZwwcw58CFHVo64ja9hctsv+VLStXlJ cZEukqnnU+AoDzQxfB+lkWN8fxyyea14Bf0NwUuIZtmka3BuEIOK2Tf30ImE5Ic5SXb7 tsrx35bbAYC4OU01Qce3kJJJncX3ocWOgB46QCu/f9IovefsNW/o/N+J1JR+sagoFT5p ENn1E/QrB7D4hZ9mm0IrIrV7vV1rx4vkAGgzirs7TjT7qNfaHf5dUvfMbY5jpcF3kr/c 20pA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to; bh=PlV5dKQ/n0l45uF01oCoe9fR+JFqw8N7I1BZiUgGYts=; b=gm4GjG6OUhSrP8EQLdfl8/d4QT3nJyEnZEs/H4Pux7hJwggTR+m678CMwfBgCYE5KQ VzdgYsgP50+irG1vMnXwJptFa/cLDRPiV9t3TQ5uVx0bnCwffCCl6bjfR7RkX4rqjYXU +VAIQYuBNZil55GyLTlHKBS/PyA2TQiihQjZRARZJkOMMcCiYSfbfNa+fBIAGml0KGxi f8vwgXO5Qb4ijDzRkI5s+2iog4lbUME+Su+yWanygFhg5/jEb6Guk44a1U7IXuvGCEAh ZToTizhjYtLLRRLP9VYF7bdFCMoa/skH4Y6SyJZFUf6Dcuy2St4vB9BF5GtT5CVWcEKg 1Npg== X-Gm-Message-State: AE9vXwP3lXWfO6lc315XTuKIjLIqmvx/VQtgPpYLto5Za8XJ9r+UUxTPFqdhZF3QAURHm5o5 X-Received: by 10.194.103.3 with SMTP id fs3mr20948836wjb.115.1473779586181; Tue, 13 Sep 2016 08:13:06 -0700 (PDT) Received: from mogwai.baylibre.com ([90.63.244.31]) by smtp.googlemail.com with ESMTPSA id b128sm5813245wmb.21.2016.09.13.08.13.05 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 13 Sep 2016 08:13:05 -0700 (PDT) From: Jerome Brunet To: Linus Walleij , Kevin Hilman , Carlo Caione Subject: [RESEND PATCH v2 2/4] pinctrl: amlogic: gxbb: add nand pins Date: Tue, 13 Sep 2016 17:12:22 +0200 Message-Id: <1473779542-2635-2-git-send-email-jbrunet@baylibre.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1473779542-2635-1-git-send-email-jbrunet@baylibre.com> References: <1473779542-2635-1-git-send-email-jbrunet@baylibre.com> In-Reply-To: <1473409738-27175-1-git-send-email-jbrunet@baylibre.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160913_081328_323155_24A4FAF3 X-CRM114-Status: GOOD ( 11.77 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-amlogic@lists.infradead.org, linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Jerome Brunet MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add EE domains pins for the NAND flash controller. Even tough we have no driver for the NAND flash controller yet, we need to have these pins in pinctrl as the actual pin are shared with the spifc controller. The bootloader on the S905-P200 setup pinmux for the NAND controller so we need the kernel to properly deactivate this if necessary. Acked-by: Kevin Hilman Signed-off-by: Jerome Brunet --- drivers/pinctrl/meson/pinctrl-meson-gxbb.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c index 573901887cee..b06cc12f2500 100644 --- a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c +++ b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c @@ -176,6 +176,15 @@ static const unsigned int sdio_cmd_pins[] = { PIN(GPIOX_4, EE_OFF) }; static const unsigned int sdio_clk_pins[] = { PIN(GPIOX_5, EE_OFF) }; static const unsigned int sdio_irq_pins[] = { PIN(GPIOX_7, EE_OFF) }; +static const unsigned int nand_ce0_pins[] = { PIN(BOOT_8, EE_OFF) }; +static const unsigned int nand_ce1_pins[] = { PIN(BOOT_9, EE_OFF) }; +static const unsigned int nand_rb0_pins[] = { PIN(BOOT_10, EE_OFF) }; +static const unsigned int nand_ale_pins[] = { PIN(BOOT_11, EE_OFF) }; +static const unsigned int nand_cle_pins[] = { PIN(BOOT_12, EE_OFF) }; +static const unsigned int nand_wen_clk_pins[] = { PIN(BOOT_13, EE_OFF) }; +static const unsigned int nand_ren_wr_pins[] = { PIN(BOOT_14, EE_OFF) }; +static const unsigned int nand_dqs_pins[] = { PIN(BOOT_15, EE_OFF) }; + static const unsigned int uart_tx_a_pins[] = { PIN(GPIOX_12, EE_OFF) }; static const unsigned int uart_rx_a_pins[] = { PIN(GPIOX_13, EE_OFF) }; static const unsigned int uart_cts_a_pins[] = { PIN(GPIOX_14, EE_OFF) }; @@ -439,6 +448,14 @@ static struct meson_pmx_group meson_gxbb_periphs_groups[] = { GROUP(nor_q, 5, 3), GROUP(nor_c, 5, 2), GROUP(nor_cs, 5, 0), + GROUP(nand_ce0, 4, 26), + GROUP(nand_ce1, 4, 27), + GROUP(nand_rb0, 4, 25), + GROUP(nand_ale, 4, 24), + GROUP(nand_cle, 4, 23), + GROUP(nand_wen_clk, 4, 22), + GROUP(nand_ren_wr, 4, 21), + GROUP(nand_dqs, 4, 20), /* Bank CARD */ GROUP(sdcard_d1, 2, 14), @@ -540,6 +557,11 @@ static const char * const sdio_groups[] = { "sdio_cmd", "sdio_clk", "sdio_irq", }; +static const char * const nand_groups[] = { + "nand_ce0", "nand_ce1", "nand_rb0", "nand_ale", "nand_cle", + "nand_wen_clk", "nand_ren_wr", "nand_dqs", +}; + static const char * const uart_a_groups[] = { "uart_tx_a", "uart_rx_a", "uart_cts_a", "uart_rts_a", }; @@ -635,6 +657,7 @@ static struct meson_pmx_func meson_gxbb_periphs_functions[] = { FUNCTION(nor), FUNCTION(sdcard), FUNCTION(sdio), + FUNCTION(nand), FUNCTION(uart_a), FUNCTION(uart_b), FUNCTION(uart_c),