From patchwork Tue Oct 4 18:12:09 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brian Norris X-Patchwork-Id: 9362213 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 93A97607D6 for ; Tue, 4 Oct 2016 18:15:16 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8820C28BB7 for ; Tue, 4 Oct 2016 18:15:16 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7C8E328BBD; Tue, 4 Oct 2016 18:15:16 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED, T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D402F28BB7 for ; Tue, 4 Oct 2016 18:15:14 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1brUDf-000343-8s; Tue, 04 Oct 2016 18:13:35 +0000 Received: from mail-pf0-x22d.google.com ([2607:f8b0:400e:c00::22d]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1brUDP-0002yH-8W for linux-arm-kernel@lists.infradead.org; Tue, 04 Oct 2016 18:13:20 +0000 Received: by mail-pf0-x22d.google.com with SMTP id e6so22444315pfk.1 for ; Tue, 04 Oct 2016 11:12:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id; bh=5b9A4pFW0K03+SEqpUH6HS4k0ZABc8rEnMf0pu5UUy4=; b=T86NnO5LHolvGmw4b5Qk5B5ahnkGCv+XUgcr6TKyzUoeBdLp7cgmI80LKKPf2v57q4 HvCSGn12I6rlAsjvhF3/ZsbPSWP6rD+NA9u0Pfx3fNo7dd5D9xzfpvzctF4KvPlGugX9 JH7pZOj5TnlOAyg5MHXDgXptGt6OKVshezZyI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=5b9A4pFW0K03+SEqpUH6HS4k0ZABc8rEnMf0pu5UUy4=; b=VNNffYRR5YkFS+vW90PKEwPtQrOAnIcVO7xNex1n27XXXShsh+RZEDfCRDs3nxZGGe sNWoUOsl8bQRUI0yVby0UWgmUpMENQJ5maJgujuILS177M68aShP5jgIsbsUYL9iQjFM 1a+2BewXmXGYvT01dQC/JzqnFUVS91eursTpzhYHH2XBlaXWHBSsxTD4/JcYKd+VX82+ 3IGHYqVZXp4cGYJUL/PHlHst4dPNZyJJij7zkHik6wsKfyz2srtPHHdrydxPmBcUrgVM YAQINQz2YaxjxpC9wnqUg6PSN1ka1QIFm6WBzGTo3mltmGFZfBCkooCuM43grZAdfOUk DScg== X-Gm-Message-State: AA6/9Rn4e/URN4HWc+822ua8rH/tq6Y7r2t02v9eNeREd3/q79ggZPR9Gn5CWjOSQ5swvgyx X-Received: by 10.98.40.66 with SMTP id o63mr8344824pfo.10.1475604767082; Tue, 04 Oct 2016 11:12:47 -0700 (PDT) Received: from ban.mtv.corp.google.com ([172.22.64.120]) by smtp.gmail.com with ESMTPSA id y205sm7515262pfb.37.2016.10.04.11.12.46 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 04 Oct 2016 11:12:46 -0700 (PDT) From: Brian Norris To: Daniel Lezcano , Thomas Gleixner , Heiko Stuebner Subject: [PATCH v2 1/2] clocksource: arm_arch_timer: Don't assume clock runs in suspend Date: Tue, 4 Oct 2016 11:12:09 -0700 Message-Id: <1475604730-140264-1-git-send-email-briannorris@chromium.org> X-Mailer: git-send-email 2.8.0.rc3.226.g39d4020 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20161004_111319_435316_96D86125 X-CRM114-Status: GOOD ( 17.90 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Marc Zyngier , Catalin Marinas , Brian Norris , Stephen Boyd , linux-kernel@vger.kernel.org, Will Deacon , Douglas Anderson , linux-rockchip@lists.infradead.org, Rob Herring , linux-arm-kernel@lists.infradead.org, Caesar Wang MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The ARM ARM specifies that the system counter "must be implemented in an always-on power domain," and so we try to use the counter as a source of timekeeping across suspend/resume. Unfortunately, some SoCs (e.g., Rockchip's RK3399) do not keep the counter ticking properly when switched from their high-power clock to the lower-power clock used in system suspend. Support this quirk by adding a new device tree property. Signed-off-by: Brian Norris Reviewed-by: Douglas Anderson Acked-by: Marc Zyngier --- v2: * add new device tree property, instead of re-using the "always-on" property (which has different meaning) Documentation/devicetree/bindings/arm/arch_timer.txt | 5 +++++ drivers/clocksource/arm_arch_timer.c | 9 ++++++++- 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/arm/arch_timer.txt b/Documentation/devicetree/bindings/arm/arch_timer.txt index ef5fbe9a77c7..ad440a2b8051 100644 --- a/Documentation/devicetree/bindings/arm/arch_timer.txt +++ b/Documentation/devicetree/bindings/arm/arch_timer.txt @@ -38,6 +38,11 @@ to deliver its interrupts via SPIs. architecturally-defined reset values. Only supported for 32-bit systems which follow the ARMv7 architected reset values. +- arm,no-tick-in-suspend : The main counter does not tick when the system is in + low-power system suspend on some SoCs. This behavior does not match the + Architecture Reference Manual's specification that the system counter "must + be implemented in an always-on power domain." + Example: diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 73c487da6d2a..a2503db7e533 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -81,6 +81,7 @@ static struct clock_event_device __percpu *arch_timer_evt; static enum ppi_nr arch_timer_uses_ppi = VIRT_PPI; static bool arch_timer_c3stop; static bool arch_timer_mem_use_virtual; +static bool arch_counter_suspend_stop; static bool evtstrm_enable = IS_ENABLED(CONFIG_ARM_ARCH_TIMER_EVTSTREAM); @@ -576,7 +577,7 @@ static struct clocksource clocksource_counter = { .rating = 400, .read = arch_counter_read, .mask = CLOCKSOURCE_MASK(56), - .flags = CLOCK_SOURCE_IS_CONTINUOUS | CLOCK_SOURCE_SUSPEND_NONSTOP, + .flags = CLOCK_SOURCE_IS_CONTINUOUS, }; static struct cyclecounter cyclecounter = { @@ -616,6 +617,8 @@ static void __init arch_counter_register(unsigned type) arch_timer_read_counter = arch_counter_get_cntvct_mem; } + if (!arch_counter_suspend_stop) + clocksource_counter.flags |= CLOCK_SOURCE_SUSPEND_NONSTOP; start_count = arch_timer_read_counter(); clocksource_register_hz(&clocksource_counter, arch_timer_rate); cyclecounter.mult = clocksource_counter.mult; @@ -907,6 +910,10 @@ static int __init arch_timer_of_init(struct device_node *np) of_property_read_bool(np, "arm,cpu-registers-not-fw-configured")) arch_timer_uses_ppi = PHYS_SECURE_PPI; + /* On some systems, the counter stops ticking when in suspend. */ + arch_counter_suspend_stop = of_property_read_bool(np, + "arm,no-tick-in-suspend"); + return arch_timer_init(); } CLOCKSOURCE_OF_DECLARE(armv7_arch_timer, "arm,armv7-timer", arch_timer_of_init);