From patchwork Sun Oct 16 14:59:17 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 9378167 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 9B8EC607D4 for ; Sun, 16 Oct 2016 15:02:38 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8960628C9E for ; Sun, 16 Oct 2016 15:02:38 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7D00928DFB; Sun, 16 Oct 2016 15:02:38 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 33EE128C9E for ; Sun, 16 Oct 2016 15:02:36 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bvmvo-000851-3F; Sun, 16 Oct 2016 15:00:56 +0000 Received: from conuserg-12.nifty.com ([210.131.2.79]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1bvmvM-00078N-5d for linux-arm-kernel@lists.infradead.org; Sun, 16 Oct 2016 15:00:29 +0000 Received: from grover.sesame (FL1-111-169-71-157.osk.mesh.ad.jp [111.169.71.157]) (authenticated) by conuserg-12.nifty.com with ESMTP id u9GExPp7010750; Sun, 16 Oct 2016 23:59:33 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-12.nifty.com u9GExPp7010750 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1476629975; bh=GKlO0OhbVipdUwBXgfgYxQ1lIxTA6i2KWawDQbLI/z8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=wQVpn+X+BcrWwo2aE+OissvJfTMS7Yi1UjkVDgpL6+lR039lBVM5F2ZhI37Vgd6Dm DvA9u+L9O1c0tz3tpaQMAz4q/UX7nF2T2roYLD2A0+guk+MJvO7Egof9tgppDir1lN JZenmVVBjrU7V7FJu3Gmapm92G8HnEwi2z3YsjXUcXCx6x2k//81m7LToiHAJCTe9z oN2vk4jIV9JObKXrxjcX4A9HATs659crnDKBY8zwBzstxfVM4nyorZXjLNz5hLDTtx Zr6M4z1i5tyJQQdxVZBVCM/5Gfq9AtPW5n1z1DaVU6IH2ud1mf0wsUoiEMkcot8W0Q fh1mkqrJjCB0g== X-Nifty-SrcIP: [111.169.71.157] From: Masahiro Yamada To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 2/3] arm64: dts: uniphier: add CPU clock and OPP table for LD11 SoC Date: Sun, 16 Oct 2016 23:59:17 +0900 Message-Id: <1476629958-25368-3-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1476629958-25368-1-git-send-email-yamada.masahiro@socionext.com> References: <1476629958-25368-1-git-send-email-yamada.masahiro@socionext.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20161016_080028_555019_BD7D5C12 X-CRM114-Status: UNSURE ( 9.80 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Viresh Kumar , Will Deacon , linux-kernel@vger.kernel.org, Masahiro Yamada , Rob Herring , Catalin Marinas MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add a CPU clock to every CPU node and a CPU OPP table to use the generic cpufreq driver. Note: clock-latency-ns (300ns) was calculated based on the CPU-gear switch sequencer spec; it takes 12 clock cycles on the sequencer running at 50 MHz, plus a bit additional latency. Signed-off-by: Masahiro Yamada --- arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | 38 ++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi index 73e0acf..e3eb10f 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi @@ -70,14 +70,18 @@ device_type = "cpu"; compatible = "arm,cortex-a53", "arm,armv8"; reg = <0 0x000>; + clocks = <&sys_clk 33>; enable-method = "psci"; + operating-points-v2 = <&cluster0_opp>; }; cpu1: cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a53", "arm,armv8"; reg = <0 0x001>; + clocks = <&sys_clk 33>; enable-method = "psci"; + operating-points-v2 = <&cluster0_opp>; }; }; @@ -86,6 +90,40 @@ method = "smc"; }; + cluster0_opp: opp_table { + compatible = "operating-points-v2"; + opp-shared; + + opp@245000000 { + opp-hz = /bits/ 64 <245000000>; + clock-latency-ns = <300>; + }; + opp@250000000 { + opp-hz = /bits/ 64 <250000000>; + clock-latency-ns = <300>; + }; + opp@490000000 { + opp-hz = /bits/ 64 <490000000>; + clock-latency-ns = <300>; + }; + opp@500000000 { + opp-hz = /bits/ 64 <500000000>; + clock-latency-ns = <300>; + }; + opp@653333333 { + opp-hz = /bits/ 64 <653334000>; + clock-latency-ns = <300>; + }; + opp@666666666 { + opp-hz = /bits/ 64 <666667000>; + clock-latency-ns = <300>; + }; + opp@980000000 { + opp-hz = /bits/ 64 <980000000>; + clock-latency-ns = <300>; + }; + }; + clocks { refclk: ref { compatible = "fixed-clock";