From patchwork Thu Oct 20 01:15:25 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 9385729 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id D224960487 for ; Thu, 20 Oct 2016 01:15:27 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C3771296EF for ; Thu, 20 Oct 2016 01:15:27 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B6D9E29703; Thu, 20 Oct 2016 01:15:27 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED, T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 7766D296EF for ; Thu, 20 Oct 2016 01:15:27 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bx1vc-0005M1-0t; Thu, 20 Oct 2016 01:13:52 +0000 Received: from conuserg-09.nifty.com ([210.131.2.76]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1bx1vX-0005K4-Oi for linux-arm-kernel@lists.infradead.org; Thu, 20 Oct 2016 01:13:48 +0000 Received: from beagle.diag.org (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-09.nifty.com with ESMTP id u9K1D0se008597; Thu, 20 Oct 2016 10:13:01 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-09.nifty.com u9K1D0se008597 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1476925981; bh=B9f4JTEY7e6S8GFbQ1AMKfd4PByl/prrAQXuZVz7TDc=; h=From:To:Cc:Subject:Date:From; b=cAn5gE4eQKfHuEW6XVEayvkTWLz/wSxRSaap5DWK2vEzAX9KT05stUe8zU9MDWkoj hzUnlPCVssjXHRl9qMmDJjqwOtxDcm0XOijnOnkvBxq81kX4keEcbIQm8V+jSJ3x5x dulcjI1FfoWevRXsKZe5SSgqFHM2Xx8YQWhXwpi7XduPJgEL7Y+pVjwIP9G/ngvHTI 6KnZfzM/YdFop8/tzCqFrK5UKBoLATHEv2eoC2RXiNNi7eOpbL1H2Tia/Zvwt/3m0/ c1O/IBTq5kDQKgONuW61kOaX8xh8Ij8aFf8XWYufR6qHglrHJy3lCADdwl7a9ZNabG 5Xq1zHtGBfF1w== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 1/2] arm64: dts: uniphier: add CPU clock and OPP table for LD11 SoC Date: Thu, 20 Oct 2016 10:15:25 +0900 Message-Id: <1476926126-6079-1-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 1.9.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20161019_181348_076347_35A84612 X-CRM114-Status: GOOD ( 10.25 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Viresh Kumar , Will Deacon , linux-kernel@vger.kernel.org, Masahiro Yamada , Rob Herring , Catalin Marinas MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add a CPU clock to every CPU node and a CPU OPP table to use the generic cpufreq driver. Note: clock-latency-ns (300ns) was calculated based on the CPU-gear switch sequencer spec; it takes 12 clock cycles on the sequencer running at 50 MHz, plus a bit additional latency. Signed-off-by: Masahiro Yamada --- Changes in v2: - Match the node name to the opp-hz property. arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | 38 ++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi index 73e0acf..bb05f0a 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi @@ -70,14 +70,18 @@ device_type = "cpu"; compatible = "arm,cortex-a53", "arm,armv8"; reg = <0 0x000>; + clocks = <&sys_clk 33>; enable-method = "psci"; + operating-points-v2 = <&cluster0_opp>; }; cpu1: cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a53", "arm,armv8"; reg = <0 0x001>; + clocks = <&sys_clk 33>; enable-method = "psci"; + operating-points-v2 = <&cluster0_opp>; }; }; @@ -86,6 +90,40 @@ method = "smc"; }; + cluster0_opp: opp_table { + compatible = "operating-points-v2"; + opp-shared; + + opp@245000000 { + opp-hz = /bits/ 64 <245000000>; + clock-latency-ns = <300>; + }; + opp@250000000 { + opp-hz = /bits/ 64 <250000000>; + clock-latency-ns = <300>; + }; + opp@490000000 { + opp-hz = /bits/ 64 <490000000>; + clock-latency-ns = <300>; + }; + opp@500000000 { + opp-hz = /bits/ 64 <500000000>; + clock-latency-ns = <300>; + }; + opp@653334000 { + opp-hz = /bits/ 64 <653334000>; + clock-latency-ns = <300>; + }; + opp@666667000 { + opp-hz = /bits/ 64 <666667000>; + clock-latency-ns = <300>; + }; + opp@980000000 { + opp-hz = /bits/ 64 <980000000>; + clock-latency-ns = <300>; + }; + }; + clocks { refclk: ref { compatible = "fixed-clock";