From patchwork Fri Oct 21 17:14:25 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sricharan Ramabadhran X-Patchwork-Id: 9389717 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 3735960780 for ; Fri, 21 Oct 2016 17:19:56 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 23D052A1F0 for ; Fri, 21 Oct 2016 17:19:56 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1877E2A1F5; Fri, 21 Oct 2016 17:19:56 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED, T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 990B92A1F0 for ; Fri, 21 Oct 2016 17:19:55 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bxdRJ-0007nQ-GJ; Fri, 21 Oct 2016 17:17:05 +0000 Received: from smtp.codeaurora.org ([198.145.29.96]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1bxdQ5-00069Q-T9 for linux-arm-kernel@lists.infradead.org; Fri, 21 Oct 2016 17:15:51 +0000 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id B7D7B61BE8; Fri, 21 Oct 2016 17:14:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1477070090; bh=2BgIvNQ2EnPTFzl94PhrRsYNln5xLAWqTCuDBwQ9yZM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=kOVhrnxnOp8/SHzWQD+sMyjrjrfBaWscbYWFfyIyamoKyffMflragZwkI7c0MYgri hFfI0RoNv1r3myAYPWZ2LvLgjGnZxfwnDG5FQQx/FlypnGcHLATs6CzFW6WZiYAcs5 FeScB900mCZWbAYdcMFaKcpOBMeK5Qv2mcS5h7f4= Received: from blr-ubuntu-32.ap.qualcomm.com (unknown [202.46.23.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: sricharan@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 3289A61BE8; Fri, 21 Oct 2016 17:14:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1477070087; bh=2BgIvNQ2EnPTFzl94PhrRsYNln5xLAWqTCuDBwQ9yZM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=gXJLje0irzKvi0WIhlmoxU1azuHrAdC8Q/fqnJZoMqGt6/VpYX3m09XlN1ms+Q3z+ gEQANEiVezPFfUHRCtpHxuWg2aBMQltElNqHG2/tpu7ThRE9ffvFJJ4max44mzSCZB FnXgdGEx/3aaswxjS+QrESMDgBL5l2eRdJ5hWFOk= DMARC-Filter: OpenDMARC Filter v1.3.1 smtp.codeaurora.org 3289A61BE8 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=pass smtp.mailfrom=sricharan@codeaurora.org From: Sricharan R To: m.szyprowski@samsung.com, will.deacon@arm.com, robin.murphy@arm.com, joro@8bytes.org, iommu@lists.linux-foundation.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, srinivas.kandagatla@linaro.org Subject: [PATCH 3/4] iommu/arm-smmu: Add context save restore support Date: Fri, 21 Oct 2016 22:44:25 +0530 Message-Id: <1477070066-15044-4-git-send-email-sricharan@codeaurora.org> X-Mailer: git-send-email 1.8.2.1 In-Reply-To: <1477070066-15044-1-git-send-email-sricharan@codeaurora.org> References: <1477070066-15044-1-git-send-email-sricharan@codeaurora.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20161021_101550_074108_8501A566 X-CRM114-Status: GOOD ( 16.15 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sricharan@codeaurora.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The smes registers and the context bank registers are the ones that are needs to be saved and restored. Fortunately the smes are already stored as a part of the smmu device structure. So just write that back. The data required to configure the context banks are the master's domain data and pgtable cfgs. So store them as a part of the context banks info and just reconfigure the context banks on the restore path. Signed-off-by: Sricharan R --- drivers/iommu/arm-smmu.c | 52 +++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 51 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index 45f2762..578cdc2 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -328,6 +328,11 @@ struct arm_smmu_master_cfg { #define for_each_cfg_sme(fw, i, idx) \ for (i = 0; idx = __fwspec_cfg(fw)->smendx[i], i < fw->num_ids; ++i) +struct cbinfo { + struct arm_smmu_domain *domain; + struct io_pgtable_cfg pgtbl_cfg; +}; + struct arm_smmu_device { struct device *dev; @@ -378,6 +383,9 @@ struct arm_smmu_device { struct clk **clocks; u32 cavium_id_base; /* Specific to Cavium */ + + /* For save/restore of context bank registers */ + struct cbinfo *cb_saved_ctx; }; enum arm_smmu_context_fmt { @@ -972,6 +980,8 @@ static int arm_smmu_init_domain_context(struct iommu_domain *domain, /* Initialise the context bank with our page table cfg */ arm_smmu_init_context_bank(smmu_domain, &pgtbl_cfg); + smmu->cb_saved_ctx[cfg->cbndx].domain = smmu_domain; + smmu->cb_saved_ctx[cfg->cbndx].pgtbl_cfg = pgtbl_cfg; /* * Request context fault interrupt. Do this last to avoid the @@ -1861,6 +1871,10 @@ static int arm_smmu_device_cfg_probe(struct arm_smmu_device *smmu) } dev_notice(smmu->dev, "\t%u context banks (%u stage-2 only)\n", smmu->num_context_banks, smmu->num_s2_context_banks); + + smmu->cb_saved_ctx = devm_kzalloc(smmu->dev, + sizeof(struct cbinfo) * smmu->num_context_banks, + GFP_KERNEL); /* * Cavium CN88xx erratum #27704. * Ensure ASID and VMID allocation is unique across all SMMUs in @@ -2115,8 +2129,44 @@ static int arm_smmu_resume(struct device *dev) { struct platform_device *pdev = to_platform_device(dev); struct arm_smmu_device *smmu = platform_get_drvdata(pdev); + struct arm_smmu_domain *domain = NULL; + struct io_pgtable_cfg *pgtbl_cfg = NULL; + struct arm_smmu_smr *smrs = smmu->smrs; + int i = 0, idx, cb, ret, pcb = 0; + + ret = arm_smmu_enable_clocks(smmu); + if (ret) + return ret; + + arm_smmu_device_reset(smmu); - return arm_smmu_enable_clocks(smmu); + /* Restore the smes and the context banks */ + for (idx = 0; idx < smmu->num_mapping_groups; ++idx) { + mutex_lock(&smmu->stream_map_mutex); + if (!smrs[idx].valid) { + mutex_unlock(&smmu->stream_map_mutex); + continue; + } + + arm_smmu_write_sme(smmu, idx); + cb = smmu->s2crs[idx].cbndx; + mutex_unlock(&smmu->stream_map_mutex); + + if (!i || (cb != pcb)) { + domain = smmu->cb_saved_ctx[cb].domain; + pgtbl_cfg = &smmu->cb_saved_ctx[cb].pgtbl_cfg; + + if (domain) { + mutex_lock(&domain->init_mutex); + arm_smmu_init_context_bank(domain, pgtbl_cfg); + mutex_unlock(&domain->init_mutex); + } + } + pcb = cb; + i++; + } + + return 0; } static int arm_smmu_suspend(struct device *dev)