From patchwork Fri Oct 21 17:30:12 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tyler Baicar X-Patchwork-Id: 9389803 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 07293607D0 for ; Fri, 21 Oct 2016 17:35:39 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EDB642A218 for ; Fri, 21 Oct 2016 17:35:38 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E1F352A21D; Fri, 21 Oct 2016 17:35:38 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED, T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 9031E2A221 for ; Fri, 21 Oct 2016 17:35:38 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bxdgi-0007tI-Lb; Fri, 21 Oct 2016 17:33:00 +0000 Received: from smtp.codeaurora.org ([198.145.29.96]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1bxdg4-0007Lv-OA for linux-arm-kernel@lists.infradead.org; Fri, 21 Oct 2016 17:32:23 +0000 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 1D4D761E1C; Fri, 21 Oct 2016 17:31:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1477071078; bh=2n2GBzIo7Ye/K2YMyYXc26wsAOovljjBCNZdlfd8uEs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=TM5j6NSzWPBRra5Ykyz3Nj8jPPV7/5l24SrX+UCpBiQzD+c7yeAJhrlbb3HsxuEqh XF4hQ+t1VltfJpyxpLmG4fatPIrVUcicwn8L1kGABKz1jN+6r4TxpJWbsxRiKg7k1s npJHeEddgG7RBY7ASNkhwixCOSEOe6fd8/sy81fE= Received: from tbaicar-lnx.qualcomm.com (unknown [129.46.14.132]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: tbaicar@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 40B2A61E53; Fri, 21 Oct 2016 17:31:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1477071063; bh=2n2GBzIo7Ye/K2YMyYXc26wsAOovljjBCNZdlfd8uEs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=VSi0ZT6D8S1X/i3RWPC7sVLLGkgBz3SVDOXtQQFQIJJja2srDguP16PCZvjLCUYmK 4sBcWul8VhQkq0Ok78csabKRqrNCfnhjyp7gCnOQ4QDgb5az8372rQQhFCKEF530+b tCtlPuv/QULuGnkOwTAbgh4cUAHgHRAmJZ+Ak6Og= DMARC-Filter: OpenDMARC Filter v1.3.1 smtp.codeaurora.org 40B2A61E53 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=pass smtp.mailfrom=tbaicar@codeaurora.org From: Tyler Baicar To: marc.zyngier@arm.com, pbonzini@redhat.com, rkrcmar@redhat.com, linux@armlinux.org.uk, catalin.marinas@arm.com, will.deacon@arm.com, rjw@rjwysocki.net, lenb@kernel.org, matt@codeblueprint.co.uk, robert.moore@intel.com, lv.zheng@intel.com, nkaje@codeaurora.org, zjzhang@codeaurora.org, mark.rutland@arm.com, james.morse@arm.com, akpm@linux-foundation.org, eun.taik.lee@samsung.com, sandeepa.s.prabhu@gmail.com, shijie.huang@arm.com, rruigrok@codeaurora.org, paul.gortmaker@windriver.com, tomasz.nowicki@linaro.org, fu.wei@linaro.org, rostedt@goodmis.org, bristot@redhat.com, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, linux-efi@vger.kernel.org, Suzuki.Poulose@arm.com, punit.agrawal@arm.com, astone@redhat.com, harba@codeaurora.org, hanjun.guo@linaro.org Subject: [PATCH V4 09/10] trace, ras: add ARM processor error trace event Date: Fri, 21 Oct 2016 11:30:12 -0600 Message-Id: <1477071013-29563-10-git-send-email-tbaicar@codeaurora.org> X-Mailer: git-send-email 1.8.2.1 In-Reply-To: <1477071013-29563-1-git-send-email-tbaicar@codeaurora.org> References: <1477071013-29563-1-git-send-email-tbaicar@codeaurora.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20161021_103220_977225_04476232 X-CRM114-Status: GOOD ( 14.26 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Tyler Baicar MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Currently there are trace events for the various RAS errors with the exception of ARM processor type errors. Add a new trace event for such errors so that the user will know when they occur. These trace events are consistent with the ARM processor error section type defined in UEFI 2.6 spec section N.2.4.4. Signed-off-by: Tyler Baicar Acked-by: Steven Rostedt --- drivers/acpi/apei/ghes.c | 9 +++++++- drivers/firmware/efi/cper.c | 1 + drivers/ras/ras.c | 1 + include/ras/ras_event.h | 55 +++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 65 insertions(+), 1 deletion(-) diff --git a/drivers/acpi/apei/ghes.c b/drivers/acpi/apei/ghes.c index b1a1edb..ae6dedb 100644 --- a/drivers/acpi/apei/ghes.c +++ b/drivers/acpi/apei/ghes.c @@ -515,7 +515,14 @@ static void ghes_do_proc(struct ghes *ghes, } #endif - else { + else if (!uuid_le_cmp(sec_type, CPER_SEC_PROC_ARMV8)) { + struct cper_sec_proc_armv8 *armv8_err; + struct cper_armv8_err_info *err_info; + + armv8_err = acpi_hest_generic_data_payload(gdata); + err_info = (void *)(armv8_err +1); + trace_arm_event(armv8_err, err_info); + } else { void *unknown_err = acpi_hest_generic_data_payload(gdata); trace_unknown_sec_event(&sec_type, fru_id, fru_text, sec_sev, diff --git a/drivers/firmware/efi/cper.c b/drivers/firmware/efi/cper.c index 866a623..3a1a867 100644 --- a/drivers/firmware/efi/cper.c +++ b/drivers/firmware/efi/cper.c @@ -35,6 +35,7 @@ #include #include #include +#include #define INDENT_SP " " diff --git a/drivers/ras/ras.c b/drivers/ras/ras.c index fb2500b..8ba5a94 100644 --- a/drivers/ras/ras.c +++ b/drivers/ras/ras.c @@ -28,3 +28,4 @@ EXPORT_TRACEPOINT_SYMBOL_GPL(extlog_mem_event); #endif EXPORT_TRACEPOINT_SYMBOL_GPL(mc_event); EXPORT_TRACEPOINT_SYMBOL_GPL(unknown_sec_event); +EXPORT_TRACEPOINT_SYMBOL_GPL(arm_event); diff --git a/include/ras/ras_event.h b/include/ras/ras_event.h index 5861b6f..0060bba 100644 --- a/include/ras/ras_event.h +++ b/include/ras/ras_event.h @@ -162,6 +162,61 @@ TRACE_EVENT(mc_event, ); /* + * ARM Processor Events Report + * + * This event is generated when hardware detects an ARM processor error + * has occurred. UEFI 2.6 spec section N.2.4.4. + */ +TRACE_EVENT(arm_event, + + TP_PROTO(const struct cper_sec_proc_armv8 *proc, + struct cper_armv8_err_info *err_info), + + TP_ARGS(proc, err_info), + + TP_STRUCT__entry( + __field(u64, mpidr) + __field(u64, midr) + __field(u64, info) + __field(u64, virt_fault_addr) + __field(u64, phys_fault_addr) + __field(u32, running_state) + __field(u32, psci_state) + __field(u16, err_count) + __field(u8, affinity) + __field(u8, version) + __field(u8, type) + __field(u8, flags) + ), + + TP_fast_assign( + __entry->affinity = proc->affinity_level; + __entry->mpidr = proc->mpidr; + __entry->midr = proc->midr; + __entry->running_state = proc->running_state; + __entry->psci_state = proc->psci_state; + __entry->version = err_info->version; + __entry->type = err_info->type; + __entry->err_count = err_info->multiple_error; + __entry->flags = err_info->flags; + __entry->info = err_info->error_info; + __entry->virt_fault_addr = err_info->virt_fault_addr; + __entry->phys_fault_addr = err_info->physical_fault_addr; + ), + + TP_printk("affinity level: %d; MPIDR: %016llx; MIDR: %016llx; " + "running state: %d; PSCI state: %d; version: %d; type: %d; " + "error count: 0x%04x; flags: 0x%02x; info: %016llx; " + "virtual fault address: %016llx; " + "physical fault address: %016llx", + __entry->affinity, __entry->mpidr, __entry->midr, + __entry->running_state, __entry->psci_state, __entry->version, + __entry->type, __entry->err_count, __entry->flags, + __entry->info, __entry->virt_fault_addr, + __entry->phys_fault_addr) +); + +/* * Unknown Section Report * * This event is generated when hardware detected a hardware