From patchwork Fri Oct 21 20:33:06 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yury Norov X-Patchwork-Id: 9390085 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id EF2CD60231 for ; Fri, 21 Oct 2016 20:38:26 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DF49E29F03 for ; Fri, 21 Oct 2016 20:38:26 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D2E2629F28; Fri, 21 Oct 2016 20:38:26 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAD_ENC_HEADER,BAYES_00, DKIM_SIGNED, RCVD_IN_DNSWL_MED, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id BD93029F03 for ; Fri, 21 Oct 2016 20:38:25 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bxgYZ-00058S-5Z; Fri, 21 Oct 2016 20:36:47 +0000 Received: from mail-by2nam01on0061.outbound.protection.outlook.com ([104.47.34.61] helo=NAM01-BY2-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1bxgWu-0002S3-Fj for linux-arm-kernel@lists.infradead.org; Fri, 21 Oct 2016 20:35:09 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=CAVIUMNETWORKS.onmicrosoft.com; s=selector1-caviumnetworks-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version; bh=tk6dulBCWefQSFoU6SzSB0y+UHLECixogOM5VcDGKlM=; b=yyMwTZaUDFINk8LLTpJoLD43XriqauGDHY3fXbNx0XSNBP7LSLa3ul25eyHtt/EJX5U3IubQKJkpqpEeoDnAbA/ClYqMuXn2dwOmlpZ+omvkPf6zqp7K1OoImyn+Njb9sXYIj4yC7W+54eImvYsNHEndZfhEjwL3sjJzK+ky9S0= Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=Yuri.Norov@caviumnetworks.com; Received: from localhost (95.143.213.121) by CY1PR07MB2245.namprd07.prod.outlook.com (10.164.112.147) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P384) id 15.1.669.12; Fri, 21 Oct 2016 20:34:41 +0000 From: Yury Norov To: , , , , , Subject: [PATCH 07/18] arm64: introduce is_a32_task and is_a32_thread (for AArch32 compat) Date: Fri, 21 Oct 2016 23:33:06 +0300 Message-ID: <1477081997-4770-8-git-send-email-ynorov@caviumnetworks.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1477081997-4770-1-git-send-email-ynorov@caviumnetworks.com> References: <1477081997-4770-1-git-send-email-ynorov@caviumnetworks.com> MIME-Version: 1.0 X-Originating-IP: [95.143.213.121] X-ClientProxiedBy: AM5PR0101CA0017.eurprd01.prod.exchangelabs.com (10.169.240.27) To CY1PR07MB2245.namprd07.prod.outlook.com (10.164.112.147) X-MS-Office365-Filtering-Correlation-Id: ac60f298-7453-4204-f578-08d3f9f1af7a X-Microsoft-Exchange-Diagnostics: 1; CY1PR07MB2245; 2:2RzqAXcY6wzaN1DnkMxRIYRIkzF+pwCK/nB6KFd3FZJ4gJb5XkuQwd0TW17Wo9txNrhgBDqprgi1J9e7Fc+ncFPPOnuk5WsOLSGwSHIMYq78OaFeqAx2DDelBL4ibAu8M+gkFWS0+oEO9AjKuW3xTQ38gjhcvMSStRG/i0OYo+uI0ReBAVn7coK4hv+gOpznvCzIGvNu6Q1RglFd7ebxpQ==; 3:gQ/xYLWILOhbNWQuH7Uu0rG6S/+MdEQuY5Hl25E0mEVnajTDB3PwJISSXyvsaCWGkhXSVYfdsZDGVeS+PuccHDfM31Hjc+kpdxYXYGNgmx5hFwFMFwfmrAbg0cdxkiuKqE/Pokwz+52oBK2PNonBSw==; 25:N3YB3ajz3jQrNQ9fhXbH3gsc3xHWy3b0vBUFrQHMTUPkTt57PDaKodm2i1O+OYVdSaoH9Me9N6iyx8XFTmkw1RXdSvmnEHiklaCAMMZaq2NDGAK/FO4Hm/gllK+wufpMjb2WKXoOS/uF0F//pOaL399IMIwyEJGXHDiPkivURiasAzXOglcHdAEEZkextIpLd5pWbR0wJxfRFJFH27IOpxlulnDdYGgiD6Mif18bVfU1AbSVBiTmuTrqfDASHKHT2PY97vnmiSDqcOzziHEDhY79pwkf6T5f8vwxF7SLFE7AJhnp+zjwHXKXhJ1pyEEUR9fAQaZCwJQORg1M8/gnz2pl6u+xal1CkXV5WRlaksW99QWQAAV/fH+4CV6qxl0IooeNyrV4KxeXk07HLvYuGacYq5OPViZFNynMHsd705Tplwt3/SCZHpXGJd7zkjRF X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:CY1PR07MB2245; X-Microsoft-Exchange-Diagnostics: 1; CY1PR07MB2245; 31:Qxj3Gs+EkAnVv7tqe2HvkOfgIAzZdffa/d5NWEpN/f3bR8KJItP8aTh0djsRLku5qqo8wp1Mm+1oK147tbm+QbafJj1FXdIj119KvLhEFqDEuKXG+ggBnWIeKwQT2AzX5sAoER8HV20RtQ6+Llt49ryJSSPZXTZ7rep+TIWPR8T8fvSejuwr5uXr/WkBK3HIGPaUmHTsyNkyCRfQMkmEKGuR/MJuql7ScBakEObyIllyz+926BDkg+KQAQk15j9M0h9c5M28pV3Jzn6ERAVg5Q==; 20:uK8H12fxF+x0LsFODqhwpnoQt2nRIQ64bbVSp5f3OTuejvIHE8T0wH+qS9ghMDQbuDI0dCD7922JMKK0MOyjtdYbBTnBdC9+7ivTVUAW0FhKGe0hEUKmr8hTuMywDre503Aup82PCu9yidL2Z6JDR2LflS80MY/xm8Vil4C9rJBTqMFa7NzTQbZ0TXQvRNnDZS97nwI106euWIz/+M1xtDIEQkEARuFCF6t7MuI6K7nAoCnl+lrbgggZ+bt72uV9z9IYvFGs118Zf7hGK9f5SL+ocKviHPuv+xfnBozRgOklhuthg+fPc2L1Is2GN3aLZUKKcpzoX3SYs+C8tDv5U8dmkNKTJfc3aap8OwNZaj2JEMF151hHEIin6aAtxjib98wJUeiHgp7KLX+bYWjvo9E1JUlM9u7L2s4F+35M4reITX9mFkPOPTVaQmlLwQLf2D1uQABlP5tfvk+IW0lRfs+fiWM97zrInh7FrW9l+1CoJ/KdJlUBfrkNclA3Ct6GfcL91mYTALH1Ct+MnUOl3V3EaJCc3TH/r0Rwhdxy24sx9ko8/xNVO27LLttJUvk/ezS1iXKNWSV0Iy25qiUG907lXz1x7AtWDOW2UXOT300= X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:(250305191791016)(22074186197030); X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(6040176)(601004)(2401047)(8121501046)(5005006)(3002001)(10201501046); SRVR:CY1PR07MB2245; BCL:0; PCL:0; RULEID:; SRVR:CY1PR07MB2245; X-Microsoft-Exchange-Diagnostics: 1; CY1PR07MB2245; 4:rMV83MKvbXpgf9oOj50yxf7MHUxDQ6rdOCX878b5ooaKNL1DGVcygxuVSchXXaVNDTEQzvCxyLLzhbTnfF3lgG4PcZssT5WwzoanY3CLxJ23r4Yk+F2c8SPVh9Aun+EC4cAjr1MxWLLKA2l635Ebl0J0McZMQQqXoDYLMhIPVkZuxr5E6LQZFjUbo+7ft9icOYKx7VsWnnnDOdsBL0jkU6eOYzOTOfngkN7pGF9rOxks71CfmXjFl3KhjgZvPtfQ8SYVgYblaGpZb4Nrpwwl/cmot7WDspwG+NxQzQK2AzCf4CCAWaJTf93z9ohNSQFJ9WmX3G2y+A4LRBukDD79cnArqn+pj4pzSYtNpwC7wdR9hM8Cnt74UC6yyIFzw2iAsCJ+oq6Cm1BkeBgAmPetmZzWUDK0vvcTZf9bEQj06QNJHaURnbEDnC/CAD62vrLhzywbwL9cV327/Qaob9thYmAEZehhWq/JL5a3HMyfiJE= X-Forefront-PRVS: 01026E1310 X-Forefront-Antispam-Report: SFV:NSPM; SFS:(10009020)(4630300001)(6069001)(6009001)(7916002)(199003)(189002)(48376002)(36756003)(50226002)(8676002)(81156014)(19580395003)(33646002)(106356001)(2201001)(7846002)(68736007)(19580405001)(7736002)(81166006)(189998001)(47776003)(97736004)(5001770100001)(92566002)(101416001)(2906002)(76176999)(50466002)(4326007)(229853001)(5660300001)(6666003)(66066001)(7416002)(3846002)(586003)(305945005)(2950100002)(105586002)(50986999)(6116002)(5003940100001)(76506005)(77096005)(42186005)(15975445007)(2004002)(2101003); DIR:OUT; SFP:1101; SCL:1; SRVR:CY1PR07MB2245; H:localhost; FPR:; SPF:None; PTR:InfoNoRecords; A:1; MX:1; LANG:en; Received-SPF: None (protection.outlook.com: caviumnetworks.com does not designate permitted sender hosts) X-Microsoft-Exchange-Diagnostics: =?us-ascii?Q?1; CY1PR07MB2245; 23:S+kFDFg2QTiaU19b/K7be3sCX9rs39zgnr5zwRNQn?= =?us-ascii?Q?NqDCjX0rIQvUot1+GLzCHDJboot8mAqpsyoJf3IiegijizGUxFxuiAOvncPT?= =?us-ascii?Q?tkdT+cZLsOWx8bB8G1NUAi4d3TwCBArR96MVvkLyGIQ7JBz2aMsa7TrCljdz?= =?us-ascii?Q?U4yrr6YW0QDYtlM9d5BMCtWpOi0j/3UdfRAYaBvjyLWcYaCxCHxMKemhgCN0?= =?us-ascii?Q?cRXGRsZMVW806IjsgcPdKcjM0Ijv8ER7Ul6OSwCv5nnNi3y4kup687tGsI2g?= =?us-ascii?Q?9xNsNbOXXmkssiZx7Ut+hrR53J9jri6pfM85QsthSymFjJVkjfvdcrfWQttN?= =?us-ascii?Q?ik9Bl00tk+kUx+sJ71cD8wE2C5Pg5ePRMJhBSmKFcIZIsg6DAZn/RNfWcFNJ?= =?us-ascii?Q?+s5uJuQDCsn2wonI+qpgkG6HHM0/Uy1bn5Qf9H5gyrIhDLrwAJY74eRhilpU?= =?us-ascii?Q?UBVXQF3yzqm4sFaCTvvXJVlxLIVLpn/qLdsta6/705Ts6wPnj57FEPvOhGR6?= =?us-ascii?Q?b2OhlVM2525CUdMuHPGJjG5ZObuiihhNSPbvidRnbWh9K09YCNdcAuirjBxj?= =?us-ascii?Q?z0AUsWelKSumolSc+pBpPbOzOQpnJrW7rFJ4RhKmQ5XRnv9Iz31D1EZVqMMg?= =?us-ascii?Q?B62tCKEQY4Q3O97pJ2ByOx59O97d5VJf8kInn8MGW5uOlzodiQrOQpMmFioP?= =?us-ascii?Q?U7jr5Yv7nkIctbPRtmm35VTQfzlQ+Xc8TFfD4V4kxDKAs7N9xYmiCbmjteaU?= =?us-ascii?Q?keQ7sM3hRRkwc1pG7lthsvyPeaBfn3JrO/bGjTMlmTwoZT/+pwD2wEEij+VZ?= =?us-ascii?Q?uyXVGDRMNKN7kJYZy5qXPckhNSy6McZZhqgtskiOOQxO3koJfee6pKrwmxQD?= =?us-ascii?Q?VCU52dye+h/UzmEMk8Wg88rUFoE8SxaNA6kDUz7h5wjknDmzHmQsU3bGybU6?= =?us-ascii?Q?EvPrCUNJPQpIvvA5o9hWfy34yXFDSx0n2AdWTDyvgLzKlFVZWQx00kYSV+ZR?= =?us-ascii?Q?SC/tW5fJBOY92feQwso28a2C5oF4aCqMizgmCgI3azNb4UsI1WjLfdbxlUvR?= =?us-ascii?Q?8834LwPAbVcMbfmmU8MZrktcCQbI2C8iBV0YCXk4QmG+0pZDKqy+TdqeKlmC?= =?us-ascii?Q?wZ/fXUEMxszIXsChuQuMWax7/Rf1GSEkH/QEZqKqqxZ9QIr6hq7Glmcm0lxQ?= =?us-ascii?Q?NomN0/E2bfZ7R7F9+PG1gQ1RLwFdm+b5gh8EFaMkNgRW9MUFa/UGDRNwg=3D?= =?us-ascii?Q?=3D?= X-Microsoft-Exchange-Diagnostics: 1; CY1PR07MB2245; 6:g11U8s6T6f5Fn1RWrf4M/OCvrJxCWUnSRnzh519MyhscYiYtl2e0wMBPU2GLxlJJhmqT8pxUqqidmhIWfri3HcqTfvCC25B6XBtpUamqsKlh79AKTDZc+hfHMZE8Of+D5wAq8QRygABUtXVTefvq+QxPuhl6eaYfNZ07/E4ZGqE7SqHdlBbNP7jhMhmk+aAlE+uHINoS7uzhEpH3+XZ2yvTwSSu+BIKysbXu0o54H8+laVmRyiUGAT2iMnRDOcMmrKx4wvaM3eQ+GDN0FHOZBHYOvHFcIsGU1pOa9Qclj8t/FgxfMLcUZFiX7r5mCdTE; 5:hJwuSE0f0z7HayIe+uLtKvO2nh8l0gVCISIQh9RtoufMxUY0ftTcPe6UjrNOPaBR2oX6Ipbj1w4XlUVJM0opAUg3YVsecGQTLS45keA/v9m5FqgWgwdOrj7Sm5lNk9rNtu+1acqFKDlSyddsnoOibN5tCXqSBcFse4vRM5AeAf4=; 24:XzOPiZxwb1kRLSr4vQVDbimXSlbxxHbkOj4gNJjsGBKgauteKOp88WbzS6vE10YyssLqMSvDhgWbi83YZdSjWHpnCPIfxhCc+D/aAceZGSM=; 7:52oRohpWJNSEjS+I2DFIiQrd5yqr0cTdERCdgJs06t6oXGbS4vfft/FkVDJ+HSVDpFux7xszomhdiLp6qL2+/ARzyCopX/TnLIgPxrvImbHwnvSACak/FH6qKS1FoYEvjKketQniYUYoHB6Yeh+rzza3PdQ1pFRLzQm/FddnqlyXcTyDRAyBDrRBcSeTIzePrCSCwc5h14qu3Y+1zA3hA3Zm+vJm8mWZ8cLuQSup0Hs4iyqNE1mIbdcr6rmsu/FBfbMgm1eE2WkpzT9EYYcUtEZkJjP5g4gDHBk7lzQNzvaT13n7GLfgwMUTtbiXw0jB/WwT37QSikYyM+M9Uckpi5ZGXwZeIaJjJ0VafcwKoU0= SpamDiagnosticOutput: 1:99 SpamDiagnosticMetadata: NSPM X-OriginatorOrg: caviumnetworks.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Oct 2016 20:34:41.1924 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY1PR07MB2245 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20161021_133504_900360_DA1E1AF4 X-CRM114-Status: GOOD ( 16.38 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: szabolcs.nagy@arm.com, heiko.carstens@de.ibm.com, cmetcalf@ezchip.com, ynorov@caviumnetworks.com, philipp.tomsich@theobroma-systems.com, joseph@codesourcery.com, zhouchengming1@huawei.com, Prasun.Kapoor@caviumnetworks.com, agraf@suse.de, Andrew Pinski , geert@linux-m68k.org, kilobyte@angband.pl, manuel.montezelo@gmail.com, pinskia@gmail.com, linyongting@huawei.com, klimov.linux@gmail.com, broonie@kernel.org, bamvor.zhangjian@huawei.com, Bamvor Zhang Jian , maxim.kuvyrkov@linaro.org, Nathan_Lynch@mentor.com, schwidefsky@de.ibm.com, davem@davemloft.net, christoph.muellner@theobroma-systems.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Based on patch of Andrew Pinski. This patch introduces is_a32_compat_task and is_a32_thread so it is easier to say this is a a32 specific thread or a generic compat thread/task. Corresponding functions are located in to avoid mess in headers. Some files include both and , and this is wrong because has already included. It was fixed too. Signed-off-by: Yury Norov Signed-off-by: Andrew Pinski Signed-off-by: Bamvor Zhang Jian --- arch/arm64/include/asm/compat.h | 19 ++--------- arch/arm64/include/asm/elf.h | 10 +++--- arch/arm64/include/asm/ftrace.h | 2 +- arch/arm64/include/asm/is_compat.h | 64 ++++++++++++++++++++++++++++++++++++ arch/arm64/include/asm/memory.h | 5 +-- arch/arm64/include/asm/processor.h | 5 +-- arch/arm64/include/asm/syscall.h | 2 +- arch/arm64/include/asm/thread_info.h | 2 +- arch/arm64/kernel/hw_breakpoint.c | 10 +++--- arch/arm64/kernel/perf_regs.c | 2 +- arch/arm64/kernel/process.c | 7 ++-- arch/arm64/kernel/ptrace.c | 11 +++---- arch/arm64/kernel/signal.c | 4 +-- arch/arm64/kernel/traps.c | 3 +- 14 files changed, 98 insertions(+), 48 deletions(-) create mode 100644 arch/arm64/include/asm/is_compat.h diff --git a/arch/arm64/include/asm/compat.h b/arch/arm64/include/asm/compat.h index eb8432b..df2f72d 100644 --- a/arch/arm64/include/asm/compat.h +++ b/arch/arm64/include/asm/compat.h @@ -24,6 +24,8 @@ #include #include +#include + #define COMPAT_USER_HZ 100 #ifdef __AARCH64EB__ #define COMPAT_UTS_MACHINE "armv8b\0\0" @@ -298,23 +300,6 @@ struct compat_shmid64_ds { compat_ulong_t __unused5; }; -static inline int is_compat_task(void) -{ - return test_thread_flag(TIF_32BIT); -} - -static inline int is_compat_thread(struct thread_info *thread) -{ - return test_ti_thread_flag(thread, TIF_32BIT); -} - -#else /* !CONFIG_COMPAT */ - -static inline int is_compat_thread(struct thread_info *thread) -{ - return 0; -} - #endif /* CONFIG_COMPAT */ #endif /* __KERNEL__ */ #endif /* __ASM_COMPAT_H */ diff --git a/arch/arm64/include/asm/elf.h b/arch/arm64/include/asm/elf.h index a55384f..6a9049b 100644 --- a/arch/arm64/include/asm/elf.h +++ b/arch/arm64/include/asm/elf.h @@ -16,6 +16,10 @@ #ifndef __ASM_ELF_H #define __ASM_ELF_H +#ifndef __ASSEMBLY__ +#include +#endif + #include /* @@ -153,13 +157,9 @@ extern int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp); /* 1GB of VA */ -#ifdef CONFIG_COMPAT -#define STACK_RND_MASK (test_thread_flag(TIF_32BIT) ? \ +#define STACK_RND_MASK (is_compat_task() ? \ 0x7ff >> (PAGE_SHIFT - 12) : \ 0x3ffff >> (PAGE_SHIFT - 12)) -#else -#define STACK_RND_MASK (0x3ffff >> (PAGE_SHIFT - 12)) -#endif #ifdef __AARCH64EB__ #define COMPAT_ELF_PLATFORM ("v8b") diff --git a/arch/arm64/include/asm/ftrace.h b/arch/arm64/include/asm/ftrace.h index caa955f..0feb28a 100644 --- a/arch/arm64/include/asm/ftrace.h +++ b/arch/arm64/include/asm/ftrace.h @@ -54,7 +54,7 @@ static inline unsigned long ftrace_call_adjust(unsigned long addr) #define ARCH_TRACE_IGNORE_COMPAT_SYSCALLS static inline bool arch_trace_is_compat_syscall(struct pt_regs *regs) { - return is_compat_task(); + return is_a32_compat_task(); } #endif /* ifndef __ASSEMBLY__ */ diff --git a/arch/arm64/include/asm/is_compat.h b/arch/arm64/include/asm/is_compat.h new file mode 100644 index 0000000..8dba5ca --- /dev/null +++ b/arch/arm64/include/asm/is_compat.h @@ -0,0 +1,64 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#ifndef __ASM_IS_COMPAT_H +#define __ASM_IS_COMPAT_H +#ifndef __ASSEMBLY__ + +#include + +#ifdef CONFIG_AARCH32_EL0 + +static inline int is_a32_compat_task(void) +{ + return test_thread_flag(TIF_32BIT); +} + +static inline int is_a32_compat_thread(struct thread_info *thread) +{ + return test_ti_thread_flag(thread, TIF_32BIT); +} + +#else + +static inline int is_a32_compat_task(void) + +{ + return 0; +} + +static inline int is_a32_compat_thread(struct thread_info *thread) +{ + return 0; +} + +#endif /* CONFIG_AARCH32_EL0 */ + +#ifdef CONFIG_COMPAT + +static inline int is_compat_task(void) +{ + return is_a32_compat_task(); +} + +#endif /* CONFIG_COMPAT */ + +static inline int is_compat_thread(struct thread_info *thread) +{ + return is_a32_compat_thread(thread); +} + + +#endif /* !__ASSEMBLY__ */ +#endif /* __ASM_IS_COMPAT_H */ diff --git a/arch/arm64/include/asm/memory.h b/arch/arm64/include/asm/memory.h index ba62df8..39497ae 100644 --- a/arch/arm64/include/asm/memory.h +++ b/arch/arm64/include/asm/memory.h @@ -26,6 +26,7 @@ #include #include #include +#include /* * Allow for constants defined here to be used from assembly code @@ -78,9 +79,9 @@ #ifdef CONFIG_COMPAT #define TASK_SIZE_32 UL(0x100000000) -#define TASK_SIZE (test_thread_flag(TIF_32BIT) ? \ +#define TASK_SIZE (is_compat_task() ? \ TASK_SIZE_32 : TASK_SIZE_64) -#define TASK_SIZE_OF(tsk) (test_tsk_thread_flag(tsk, TIF_32BIT) ? \ +#define TASK_SIZE_OF(tsk) (is_compat_thread(tsk) ? \ TASK_SIZE_32 : TASK_SIZE_64) #else #define TASK_SIZE TASK_SIZE_64 diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h index 6173a7b..49a046a 100644 --- a/arch/arm64/include/asm/processor.h +++ b/arch/arm64/include/asm/processor.h @@ -30,6 +30,7 @@ #include #include +#include #include #include #include @@ -40,7 +41,7 @@ #define STACK_TOP_MAX TASK_SIZE_64 #ifdef CONFIG_COMPAT #define AARCH32_VECTORS_BASE 0xffff0000 -#define STACK_TOP (test_thread_flag(TIF_32BIT) ? \ +#define STACK_TOP (is_compat_task() ? \ AARCH32_VECTORS_BASE : STACK_TOP_MAX) #else #define STACK_TOP STACK_TOP_MAX @@ -92,7 +93,7 @@ struct thread_struct { #define task_user_tls(t) \ ({ \ unsigned long *__tls; \ - if (is_compat_thread(task_thread_info(t))) \ + if (is_a32_compat_thread(task_thread_info(t))) \ __tls = &(t)->thread.tp2_value; \ else \ __tls = &(t)->thread.tp_value; \ diff --git a/arch/arm64/include/asm/syscall.h b/arch/arm64/include/asm/syscall.h index 709a574..ce09641 100644 --- a/arch/arm64/include/asm/syscall.h +++ b/arch/arm64/include/asm/syscall.h @@ -113,7 +113,7 @@ static inline void syscall_set_arguments(struct task_struct *task, */ static inline int syscall_get_arch(void) { - if (is_compat_task()) + if (is_a32_compat_task()) return AUDIT_ARCH_ARM; return AUDIT_ARCH_AARCH64; diff --git a/arch/arm64/include/asm/thread_info.h b/arch/arm64/include/asm/thread_info.h index e9ea5a6..e12411f 100644 --- a/arch/arm64/include/asm/thread_info.h +++ b/arch/arm64/include/asm/thread_info.h @@ -121,7 +121,7 @@ static inline struct thread_info *current_thread_info(void) #define TIF_FREEZE 19 #define TIF_RESTORE_SIGMASK 20 #define TIF_SINGLESTEP 21 -#define TIF_32BIT 22 /* 32bit process */ +#define TIF_32BIT 22 /* AARCH32 process */ #define _TIF_SIGPENDING (1 << TIF_SIGPENDING) #define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) diff --git a/arch/arm64/kernel/hw_breakpoint.c b/arch/arm64/kernel/hw_breakpoint.c index 948b731..4c14957 100644 --- a/arch/arm64/kernel/hw_breakpoint.c +++ b/arch/arm64/kernel/hw_breakpoint.c @@ -168,7 +168,7 @@ enum hw_breakpoint_ops { HW_BREAKPOINT_RESTORE }; -static int is_compat_bp(struct perf_event *bp) +static int is_a32_compat_bp(struct perf_event *bp) { struct task_struct *tsk = bp->hw.target; @@ -179,7 +179,7 @@ static int is_compat_bp(struct perf_event *bp) * deprecated behaviour if we use unaligned watchpoints in * AArch64 state. */ - return tsk && is_compat_thread(task_thread_info(tsk)); + return tsk && is_a32_compat_thread(task_thread_info(tsk)); } /** @@ -439,7 +439,7 @@ static int arch_build_bp_info(struct perf_event *bp) * Watchpoints can be of length 1, 2, 4 or 8 bytes. */ if (info->ctrl.type == ARM_BREAKPOINT_EXECUTE) { - if (is_compat_bp(bp)) { + if (is_a32_compat_bp(bp)) { if (info->ctrl.len != ARM_BREAKPOINT_LEN_2 && info->ctrl.len != ARM_BREAKPOINT_LEN_4) return -EINVAL; @@ -496,7 +496,7 @@ int arch_validate_hwbkpt_settings(struct perf_event *bp) * AArch32 tasks expect some simple alignment fixups, so emulate * that here. */ - if (is_compat_bp(bp)) { + if (is_a32_compat_bp(bp)) { if (info->ctrl.len == ARM_BREAKPOINT_LEN_8) alignment_mask = 0x7; else @@ -685,7 +685,7 @@ static int watchpoint_handler(unsigned long addr, unsigned int esr, info = counter_arch_bp(wp); /* AArch32 watchpoints are either 4 or 8 bytes aligned. */ - if (is_compat_task()) { + if (is_a32_compat_task()) { if (info->ctrl.len == ARM_BREAKPOINT_LEN_8) alignment_mask = 0x7; else diff --git a/arch/arm64/kernel/perf_regs.c b/arch/arm64/kernel/perf_regs.c index 3f62b35..a79058f 100644 --- a/arch/arm64/kernel/perf_regs.c +++ b/arch/arm64/kernel/perf_regs.c @@ -45,7 +45,7 @@ int perf_reg_validate(u64 mask) u64 perf_reg_abi(struct task_struct *task) { - if (is_compat_thread(task_thread_info(task))) + if (is_a32_compat_thread(task_thread_info(task))) return PERF_SAMPLE_REGS_ABI_32; else return PERF_SAMPLE_REGS_ABI_64; diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c index 27b2f13..b78f80d 100644 --- a/arch/arm64/kernel/process.c +++ b/arch/arm64/kernel/process.c @@ -47,7 +47,6 @@ #include #include -#include #include #include #include @@ -204,7 +203,7 @@ static void tls_thread_flush(void) { write_sysreg(0, tpidr_el0); - if (is_compat_task()) { + if (is_a32_compat_task()) { current->thread.tp_value = 0; /* @@ -256,7 +255,7 @@ int copy_thread(unsigned long clone_flags, unsigned long stack_start, *task_user_tls(p) = read_sysreg(tpidr_el0); if (stack_start) { - if (is_compat_thread(task_thread_info(p))) + if (is_a32_compat_thread(task_thread_info(p))) childregs->compat_sp = stack_start; else childregs->sp = stack_start; @@ -293,7 +292,7 @@ static void tls_thread_switch(struct task_struct *next) *task_user_tls(current) = tpidr; tpidr = *task_user_tls(next); - tpidrro = is_compat_thread(task_thread_info(next)) ? + tpidrro = is_a32_compat_thread(task_thread_info(next)) ? next->thread.tp_value : 0; write_sysreg(tpidr, tpidr_el0); diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c index 1d6f43e..1d075ed 100644 --- a/arch/arm64/kernel/ptrace.c +++ b/arch/arm64/kernel/ptrace.c @@ -38,7 +38,6 @@ #include #include -#include #include #include #include @@ -186,7 +185,7 @@ static void ptrace_hbptriggered(struct perf_event *bp, #ifdef CONFIG_AARCH32_EL0 int i; - if (!is_compat_task()) + if (!is_a32_compat_task()) goto send_sig; for (i = 0; i < ARM_MAX_BRP; ++i) { @@ -1304,9 +1303,9 @@ const struct user_regset_view *task_user_regset_view(struct task_struct *task) * 32-bit children use an extended user_aarch32_ptrace_view to allow * access to the TLS register. */ - if (is_compat_task()) + if (is_a32_compat_task()) return &user_aarch32_view; - else if (is_compat_thread(task_thread_info(task))) + else if (is_a32_compat_thread(task_thread_info(task))) return &user_aarch32_ptrace_view; #endif return &user_aarch64_view; @@ -1333,7 +1332,7 @@ static void tracehook_report_syscall(struct pt_regs *regs, * A scratch register (ip(r12) on AArch32, x7 on AArch64) is * used to denote syscall entry/exit: */ - regno = (is_compat_task() ? 12 : 7); + regno = (is_a32_compat_task() ? 12 : 7); saved_reg = regs->regs[regno]; regs->regs[regno] = dir; @@ -1444,7 +1443,7 @@ int valid_user_regs(struct user_pt_regs *regs, struct task_struct *task) if (!test_tsk_thread_flag(task, TIF_SINGLESTEP)) regs->pstate &= ~DBG_SPSR_SS; - if (is_compat_thread(task_thread_info(task))) + if (is_a32_compat_thread(task_thread_info(task))) return valid_compat_regs(regs); else return valid_native_regs(regs); diff --git a/arch/arm64/kernel/signal.c b/arch/arm64/kernel/signal.c index 404dd67..f90cdf5 100644 --- a/arch/arm64/kernel/signal.c +++ b/arch/arm64/kernel/signal.c @@ -276,7 +276,7 @@ static int setup_rt_frame(int usig, struct ksignal *ksig, sigset_t *set, static void setup_restart_syscall(struct pt_regs *regs) { - if (is_compat_task()) + if (is_a32_compat_task()) compat_setup_restart_syscall(regs); else regs->regs[8] = __NR_restart_syscall; @@ -295,7 +295,7 @@ static void handle_signal(struct ksignal *ksig, struct pt_regs *regs) /* * Set up the stack frame */ - if (is_compat_task()) { + if (is_a32_compat_task()) { if (ksig->ka.sa.sa_flags & SA_SIGINFO) ret = compat_setup_rt_frame(usig, ksig, oldset, regs); else diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c index 14a08a0..3644ddc 100644 --- a/arch/arm64/kernel/traps.c +++ b/arch/arm64/kernel/traps.c @@ -18,6 +18,7 @@ */ #include +#include #include #include #include @@ -528,7 +529,7 @@ asmlinkage long do_ni_syscall(struct pt_regs *regs) { #ifdef CONFIG_AARCH32_EL0 long ret; - if (is_compat_task()) { + if (is_a32_compat_task()) { ret = compat_arm_syscall(regs); if (ret != -ENOSYS) return ret;