From patchwork Mon Oct 31 14:19:27 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 9405527 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id E49D360234 for ; Mon, 31 Oct 2016 14:23:00 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C058F28D83 for ; Mon, 31 Oct 2016 14:23:00 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B51B029149; Mon, 31 Oct 2016 14:23:00 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED, T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 4827528D83 for ; Mon, 31 Oct 2016 14:23:00 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1c1DSA-0001Hd-92; Mon, 31 Oct 2016 14:20:46 +0000 Received: from mail-wm0-x22e.google.com ([2a00:1450:400c:c09::22e]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1c1DRn-0008Is-9I for linux-arm-kernel@lists.infradead.org; Mon, 31 Oct 2016 14:20:25 +0000 Received: by mail-wm0-x22e.google.com with SMTP id a197so23149478wmd.0 for ; Mon, 31 Oct 2016 07:20:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=l6Za0nO71ws7M+2vtTKdnQxeZosFdRzVM3I5/LZk2mM=; b=KsNucN59FsdHjBCyLhbyOjRynpl+moYS0lhw0qMmVxANzL7JiKfj0+T3AYIxAhYfOJ z6s20+YfQJ51St0MtbXOyJLZlbqj8qSy/IAXbnQWNAQhm0N5P6xaSaCokZJ0G3lq7eDf yXBO9kouXP7YFeZG6Tt9DKqNzBUEiF7tonh5tfiTDHPzKKtzuhs5IbpToZ1bLzBJvyBG 7a/G+BpHyDJ+K1V4IOjgihlj5N0Wz/FZvwvubcvr6AMOvt+U4FOIJECytyTsoGOD6Vjp Ma/z2ynHFYP9wcADr64suUV5qaox5Yz3dkqJ8i3n8qsdknJC8BSj/b15QFh/VWbbFcKo YOJA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=l6Za0nO71ws7M+2vtTKdnQxeZosFdRzVM3I5/LZk2mM=; b=P/CgNmXNOBLBSxr975C9F3pK6vToCL+Ux0JgDs7U2CEW++kfYIw8eD3CJyIDopjFco fTG9o8A40xKIuPKt7g0iy+mGSOdkcD3sDuCCm6UUqy8PqqaEuWmJMwofU1cOH7R/z3Bm 833SrUXdxnuE+RF2URITgyKEKfs+doBQdx/90YGir0Q+XE4mZ2dRGAXJLyeIMRk2pmZg 5I6/FJT9fYThHFjFFdHrM1NK7v4a96xqcF1dlXh+dcymXefCABsF6Kg+4RJbPBiFZPCt A+/diDrcj26fELmVgLCaTbyussXKqiAFW15SNa95LlP0GePIrFrr2TtA+iPGN+1LReBV Ah3Q== X-Gm-Message-State: ABUngvcUVgLuYh08Mjqtb9oB+0ujVCa1T3ukWhX4Yezv8Ey6yWJNrhLW7qbVKCLPpgKz/MDg X-Received: by 10.28.19.131 with SMTP id 125mr10218859wmt.133.1477923604532; Mon, 31 Oct 2016 07:20:04 -0700 (PDT) Received: from localhost.localdomain ([90.63.244.31]) by smtp.gmail.com with ESMTPSA id f4sm24929965wmd.15.2016.10.31.07.20.03 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 31 Oct 2016 07:20:03 -0700 (PDT) From: Bartosz Golaszewski To: Jyri Sarha , Tomi Valkeinen , David Airlie , Kevin Hilman , Michael Turquette , Sekhar Nori Subject: [PATCH v5 2/2] drm: tilcdc: clear the sync lost bit in crtc isr Date: Mon, 31 Oct 2016 15:19:27 +0100 Message-Id: <1477923567-1610-3-git-send-email-bgolaszewski@baylibre.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1477923567-1610-1-git-send-email-bgolaszewski@baylibre.com> References: <1477923567-1610-1-git-send-email-bgolaszewski@baylibre.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20161031_072023_586417_69628540 X-CRM114-Status: GOOD ( 16.75 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Bartosz Golaszewski , LKML , linux-drm , arm-soc MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The frame synchronization error happens when the DMA engine attempts to read what it believes to be the first word of the video buffer but it cannot be recognized as such or when the LCDC is starved of data due to insufficient bandwidth of the system interconnect. On some SoCs (notably: da850) the memory settings do not meet the LCDC throughput requirements even after increasing the memory controller command re-ordering and the LDCD master peripheral priority, sometimes causing the sync lost error (typically when changing the resolution). When the sync lost error occurs, simply reset the input FIFO in the DMA controller unless a sync lost flood is detected in which case disable the interrupt. Signed-off-by: Bartosz Golaszewski --- drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 50 ++++++++++++++++++++++++++---------- drivers/gpu/drm/tilcdc/tilcdc_regs.h | 1 + 2 files changed, 37 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c index 937697d..c4c6323 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c @@ -163,7 +163,7 @@ static void tilcdc_crtc_enable_irqs(struct drm_device *dev) if (priv->rev == 1) { tilcdc_set(dev, LCDC_RASTER_CTRL_REG, - LCDC_V1_UNDERFLOW_INT_ENA); + LCDC_V1_UNDERFLOW_INT_ENA | LCDC_V1_SYNC_LOST_ENA); tilcdc_set(dev, LCDC_DMA_CTRL_REG, LCDC_V1_END_OF_FRAME_INT_ENA); } else { @@ -181,7 +181,9 @@ static void tilcdc_crtc_disable_irqs(struct drm_device *dev) /* disable irqs that we might have enabled: */ if (priv->rev == 1) { tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, - LCDC_V1_UNDERFLOW_INT_ENA | LCDC_V1_PL_INT_ENA); + LCDC_V1_UNDERFLOW_INT_ENA | + LCDC_V1_PL_INT_ENA | + LCDC_V1_SYNC_LOST_ENA); tilcdc_clear(dev, LCDC_DMA_CTRL_REG, LCDC_V1_END_OF_FRAME_INT_ENA); } else { @@ -885,24 +887,44 @@ irqreturn_t tilcdc_crtc_irq(struct drm_crtc *crtc) wake_up(&tilcdc_crtc->frame_done_wq); } - if (stat & LCDC_SYNC_LOST) { - dev_err_ratelimited(dev->dev, "%s(0x%08x): Sync lost", - __func__, stat); - tilcdc_crtc->frame_intact = false; - if (tilcdc_crtc->sync_lost_count++ > - SYNC_LOST_COUNT_LIMIT) { - dev_err(dev->dev, "%s(0x%08x): Sync lost flood detected, disabling the interrupt", __func__, stat); - tilcdc_write(dev, LCDC_INT_ENABLE_CLR_REG, - LCDC_SYNC_LOST); - } - } - /* Indicate to LCDC that the interrupt service routine has * completed, see 13.3.6.1.6 in AM335x TRM. */ tilcdc_write(dev, LCDC_END_OF_INT_IND_REG, 0); } + if (stat & LCDC_SYNC_LOST) { + dev_err_ratelimited(dev->dev, "%s(0x%08x): Sync lost", + __func__, stat); + + tilcdc_crtc->frame_intact = false; + if (tilcdc_crtc->sync_lost_count++ > SYNC_LOST_COUNT_LIMIT) { + dev_err(dev->dev, + "%s(0x%08x): Sync lost flood detected, disabling the interrupt", + __func__, stat); + if (priv->rev == 2) + tilcdc_write(dev, LCDC_INT_ENABLE_CLR_REG, + LCDC_SYNC_LOST); + else if (priv->rev == 1) + tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, + LCDC_V1_SYNC_LOST_ENA); + } + + if (priv->rev == 2) { + /* + * Indicate to LCDC that the interrupt service routine + * has completed, see 13.3.6.1.6 in AM335x TRM. + */ + tilcdc_write(dev, LCDC_END_OF_INT_IND_REG, 0); + } else if (priv->rev == 1) { + /* Reset the input FIFO in the DMA controller. */ + tilcdc_clear(dev, + LCDC_RASTER_CTRL_REG, LCDC_RASTER_ENABLE); + tilcdc_set(dev, + LCDC_RASTER_CTRL_REG, LCDC_RASTER_ENABLE); + } + } + return IRQ_HANDLED; } diff --git a/drivers/gpu/drm/tilcdc/tilcdc_regs.h b/drivers/gpu/drm/tilcdc/tilcdc_regs.h index f57c0d6..beb8c21 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_regs.h +++ b/drivers/gpu/drm/tilcdc/tilcdc_regs.h @@ -61,6 +61,7 @@ #define LCDC_V2_UNDERFLOW_INT_ENA BIT(5) #define LCDC_V1_PL_INT_ENA BIT(4) #define LCDC_V2_PL_INT_ENA BIT(6) +#define LCDC_V1_SYNC_LOST_ENA BIT(5) #define LCDC_MONOCHROME_MODE BIT(1) #define LCDC_RASTER_ENABLE BIT(0) #define LCDC_TFT_ALT_ENABLE BIT(23)