From patchwork Fri Nov 4 13:06:34 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ding Tianhong X-Patchwork-Id: 9412613 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id E8DF26022E for ; Fri, 4 Nov 2016 13:10:58 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E06B82B057 for ; Fri, 4 Nov 2016 13:10:58 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D51F02B063; Fri, 4 Nov 2016 13:10:58 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id DA0992B057 for ; Fri, 4 Nov 2016 13:10:57 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1c2eFS-0001cH-FF; Fri, 04 Nov 2016 13:09:34 +0000 Received: from szxga01-in.huawei.com ([58.251.152.64]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1c2eEF-0000tZ-Ju for linux-arm-kernel@lists.infradead.org; Fri, 04 Nov 2016 13:08:25 +0000 Received: from 172.24.1.136 (EHLO szxeml426-hub.china.huawei.com) ([172.24.1.136]) by szxrg01-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id DUN91838; Fri, 04 Nov 2016 21:06:53 +0800 (CST) Received: from localhost (10.177.23.32) by szxeml426-hub.china.huawei.com (10.82.67.181) with Microsoft SMTP Server id 14.3.235.1; Fri, 4 Nov 2016 21:06:45 +0800 From: Ding Tianhong To: , , , , , , , , , , Subject: [PATCH v3 6/6] arm64: arch_timer: acpi: add hisi timer errata data Date: Fri, 4 Nov 2016 21:06:34 +0800 Message-ID: <1478264794-14652-6-git-send-email-dingtianhong@huawei.com> X-Mailer: git-send-email 1.8.5.2.msysgit.0 In-Reply-To: <1478264794-14652-1-git-send-email-dingtianhong@huawei.com> References: <1478264794-14652-1-git-send-email-dingtianhong@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.177.23.32] X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20161104_060823_532618_B01B055C X-CRM114-Status: UNSURE ( 8.26 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ding Tianhong Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Hanjun Guo Add hisi timer specific erratum fixes. v3: add hisilicon erratum 161601 for ACPI mode. Signed-off-by: Hanjun Guo Signed-off-by: Ding Tianhong --- drivers/clocksource/arm_arch_timer.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 9bc93e5..270d179 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -1078,10 +1078,26 @@ struct gtdt_arch_timer_fixup { u32 erratum; }; +#ifdef CONFIG_HISILICON_ERRATUM_161601 +static void __init erratum_workaround_enable(u32 erratum) +{ + if (erratum & HISILICON_161601) { + timer_unstable_counter_workaround = &arch_timer_hisi_161601; + static_branch_enable(&arch_timer_read_ool_enabled); + pr_info("Enabling workaround for HISILICON ERRATUM 161601\n"); + } +} +#endif + /* note: this needs to be updated according to the doc of OEM ID * and TABLE ID for different board. */ struct gtdt_arch_timer_fixup arch_timer_quirks[] __initdata = { +#ifdef CONFIG_HISILICON_ERRATUM_161601 + {"HISI", "hip05", 0, &erratum_workaround_enable, HISILICON_161601}, + {"HISI", "hip06", 0, &erratum_workaround_enable, HISILICON_161601}, + {"HISI", "hip07", 0, &erratum_workaround_enable, HISILICON_161601}, +#endif }; void __init arch_timer_acpi_quirks_handler(char *oem_id,