From patchwork Wed Nov 9 23:39:50 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeremy Linton X-Patchwork-Id: 9420345 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 85EA2601C2 for ; Wed, 9 Nov 2016 23:42:35 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 754092679B for ; Wed, 9 Nov 2016 23:42:35 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6891E28569; Wed, 9 Nov 2016 23:42:35 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 156B12679B for ; Wed, 9 Nov 2016 23:42:35 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1c4cUN-0002Lf-Pd; Wed, 09 Nov 2016 23:41:07 +0000 Received: from foss.arm.com ([217.140.101.70]) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1c4cTW-0008U1-F4 for linux-arm-kernel@lists.infradead.org; Wed, 09 Nov 2016 23:40:19 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9E0631575; Wed, 9 Nov 2016 15:39:55 -0800 (PST) Received: from beelzebub.ast.arm.com (unknown [10.118.96.220]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 3A1973F220; Wed, 9 Nov 2016 15:39:55 -0800 (PST) From: Jeremy Linton To: linux-arm-kernel@lists.infradead.org Subject: [PATCH V10 3/6] arm64: pmu: Cache PMU interrupt numbers from MADT parse Date: Wed, 9 Nov 2016 17:39:50 -0600 Message-Id: <1478734793-6341-4-git-send-email-jeremy.linton@arm.com> X-Mailer: git-send-email 2.5.5 In-Reply-To: <1478734793-6341-1-git-send-email-jeremy.linton@arm.com> References: <1478734793-6341-1-git-send-email-jeremy.linton@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20161109_154014_721743_205D0873 X-CRM114-Status: GOOD ( 16.75 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, linux-acpi@vger.kernel.org, punit.agrawal@arm.com, will.deacon@arm.com, mlangsdorf@redhat.com, msalter@redhat.com, steve.capper@arm.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Mark Salter In the case of ACPI, the PMU IRQ information is contained in the MADT table. Also, since the PMU does not exist as a device in the ACPI DSDT table, it is necessary to create a platform device so that the appropriate driver probing is triggered. Since the platform device creation needs to happen after the CPU's have been started, and the MADT parsing needs to happen before, we save off the interrupt numbers discovered during the parsing. Signed-off-by: Mark Salter Signed-off-by: Jeremy Linton --- arch/arm64/kernel/smp.c | 5 +++++ drivers/perf/Kconfig | 4 ++++ drivers/perf/Makefile | 1 + drivers/perf/arm_pmu_acpi.c | 40 ++++++++++++++++++++++++++++++++++++++++ include/linux/perf/arm_pmu.h | 7 +++++++ 5 files changed, 57 insertions(+) create mode 100644 drivers/perf/arm_pmu_acpi.c diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c index f3f1c90..e350ccc 100644 --- a/arch/arm64/kernel/smp.c +++ b/arch/arm64/kernel/smp.c @@ -37,6 +37,7 @@ #include #include #include +#include #include #include @@ -546,6 +547,7 @@ acpi_verify_and_map_madt(struct acpi_madt_generic_interrupt *processor) } bootcpu_valid = true; early_map_cpu_to_node(0, acpi_numa_get_nid(0, hwid)); + arm_pmu_parse_acpi(0, processor); return; } @@ -566,6 +568,9 @@ acpi_verify_and_map_madt(struct acpi_madt_generic_interrupt *processor) */ acpi_set_mailbox_entry(cpu_count, processor); + /* get PMU irq info */ + arm_pmu_parse_acpi(cpu_count, processor); + early_map_cpu_to_node(cpu_count, acpi_numa_get_nid(cpu_count, hwid)); cpu_count++; diff --git a/drivers/perf/Kconfig b/drivers/perf/Kconfig index 4d5c5f9..697df05 100644 --- a/drivers/perf/Kconfig +++ b/drivers/perf/Kconfig @@ -19,4 +19,8 @@ config XGENE_PMU help Say y if you want to use APM X-Gene SoC performance monitors. +config ARM_PMU_ACPI + def_bool y + depends on ARM_PMU && ACPI + endmenu diff --git a/drivers/perf/Makefile b/drivers/perf/Makefile index b116e98..d1d7762 100644 --- a/drivers/perf/Makefile +++ b/drivers/perf/Makefile @@ -1,2 +1,3 @@ obj-$(CONFIG_ARM_PMU) += arm_pmu.o obj-$(CONFIG_XGENE_PMU) += xgene_pmu.o +obj-$(CONFIG_ARM_PMU_ACPI) += arm_pmu_acpi.o diff --git a/drivers/perf/arm_pmu_acpi.c b/drivers/perf/arm_pmu_acpi.c new file mode 100644 index 0000000..135851c --- /dev/null +++ b/drivers/perf/arm_pmu_acpi.c @@ -0,0 +1,40 @@ +/* + * ARM ACPI PMU support + * + * Copyright (C) 2015 Red Hat Inc. + * Author: Mark Salter + * + * This work is licensed under the terms of the GNU GPL, version 2. See + * the COPYING file in the top-level directory. + * + */ + +#include +#include +#include +#include +#include +#include +#include + +struct pmu_irq { + int gsi; + int trigger; + bool registered; +}; + +static struct pmu_irq pmu_irqs[NR_CPUS]; + +/* + * Called from acpi_verify_and_map_madt()'s MADT parsing during boot. + * This routine saves off the GSI's and their trigger state for use when we are + * ready to build the PMU platform device. + */ +void __init arm_pmu_parse_acpi(int cpu, struct acpi_madt_generic_interrupt *gic) +{ + pmu_irqs[cpu].gsi = gic->performance_interrupt; + if (gic->flags & ACPI_MADT_PERFORMANCE_IRQ_MODE) + pmu_irqs[cpu].trigger = ACPI_EDGE_SENSITIVE; + else + pmu_irqs[cpu].trigger = ACPI_LEVEL_SENSITIVE; +} diff --git a/include/linux/perf/arm_pmu.h b/include/linux/perf/arm_pmu.h index 8462da2..df1ba55 100644 --- a/include/linux/perf/arm_pmu.h +++ b/include/linux/perf/arm_pmu.h @@ -164,4 +164,11 @@ int arm_pmu_device_probe(struct platform_device *pdev, #endif /* CONFIG_ARM_PMU */ +#ifdef CONFIG_ARM_PMU_ACPI +struct acpi_madt_generic_interrupt; +void arm_pmu_parse_acpi(int cpu, struct acpi_madt_generic_interrupt *gic); +#else +#define arm_pmu_parse_acpi(a, b) do { } while (0) +#endif /* CONFIG_ARM_PMU_ACPI */ + #endif /* __ARM_PMU_H__ */