From patchwork Tue Nov 22 07:49:18 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhangfei Gao X-Patchwork-Id: 9440579 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 823F960237 for ; Tue, 22 Nov 2016 07:53:15 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 75C252844E for ; Tue, 22 Nov 2016 07:53:15 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6764728479; Tue, 22 Nov 2016 07:53:15 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 7A4A62844E for ; Tue, 22 Nov 2016 07:53:14 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1c95re-0007i2-65; Tue, 22 Nov 2016 07:51:38 +0000 Received: from mail-pg0-x230.google.com ([2607:f8b0:400e:c05::230]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1c95r4-0006rh-9B for linux-arm-kernel@lists.infradead.org; Tue, 22 Nov 2016 07:51:06 +0000 Received: by mail-pg0-x230.google.com with SMTP id p66so5042873pga.2 for ; Mon, 21 Nov 2016 23:50:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=rWas2XAkhA920optTEp6vbHLovwR5pK/zQLc9yRmlOw=; b=aj13viYv099Y+uy3hU9+VubxXt56SNV3wFR/rgL+45d1SonsrpHyrgxu/jCDxCed8B jxCmNyUnRUDLdTGxQp02QqFIpQnFJc18ybl9HSVJSTQLmzT2SjSKcjimhAG0YSGlmDFj +5fh+jleK2UfgjTHvu2oYR9sNdb9vRNmEVlsI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=rWas2XAkhA920optTEp6vbHLovwR5pK/zQLc9yRmlOw=; b=Jnl0eBz4nqpfPZ/g4gyVupxb84jtHEDmBddS5D11can7NPNLPgfu1zssGWH0iDf7kA H740RS297oBjmpZE/GIETya64E0vyKTszNlI1FBG2drF9S4j3u7Kz6/TKk5EaLtaDgll 12FPQqDk1eoUXjEku/pSmOA7wTxXqQrHwcTRdO66ngt/SApEdWY6moeILofgBV4HBQBQ VkC5Ckk6ZBs1cq9WxNFofyXCHwgdjkerI5sI0kUywkX0lIL+RdXJS1SrGKZC/vcveteO F+OF7G/5czMjsfU6r4fIf6Um40PZos3PgnAQwxeNHVFo/iJiEzHs7E5aVbUOA6YbZYkM wbjA== X-Gm-Message-State: AKaTC02RXfzvAM540KmhHGjhKs0AfR1OAzouyqWPvdHabjQ8YpWro9tsGAdQ1FyMlcRhoujP X-Received: by 10.99.53.195 with SMTP id c186mr41250540pga.125.1479801041256; Mon, 21 Nov 2016 23:50:41 -0800 (PST) Received: from localhost.localdomain ([104.237.91.214]) by smtp.gmail.com with ESMTPSA id d1sm42635008pfb.76.2016.11.21.23.50.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 21 Nov 2016 23:50:40 -0800 (PST) From: Zhangfei Gao To: Philipp Zabel , Rob Herring , haojian.zhuang@linaro.org, xuwei5@hisilicon.com, Chen Feng , Xinliang Liu , Xia Qing , Jiancheng Xue Subject: [PATCH 3/6] reset: hisilicon: add reset-hi3660 Date: Tue, 22 Nov 2016 15:49:18 +0800 Message-Id: <1479800961-6249-4-git-send-email-zhangfei.gao@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1479800961-6249-1-git-send-email-zhangfei.gao@linaro.org> References: <1479800961-6249-1-git-send-email-zhangfei.gao@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20161121_235102_651321_909C664B X-CRM114-Status: GOOD ( 16.91 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Zhangfei Gao MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add hi3660 reset driver based on common reset.c Signed-off-by: Zhangfei Gao --- drivers/reset/hisilicon/Kconfig | 7 +++ drivers/reset/hisilicon/Makefile | 1 + drivers/reset/hisilicon/reset-hi3660.c | 78 ++++++++++++++++++++++++++ include/dt-bindings/reset/hisi,hi3660-resets.h | 38 +++++++++++++ 4 files changed, 124 insertions(+) create mode 100644 drivers/reset/hisilicon/reset-hi3660.c create mode 100644 include/dt-bindings/reset/hisi,hi3660-resets.h diff --git a/drivers/reset/hisilicon/Kconfig b/drivers/reset/hisilicon/Kconfig index 1ff8b0c..10134dc 100644 --- a/drivers/reset/hisilicon/Kconfig +++ b/drivers/reset/hisilicon/Kconfig @@ -1,3 +1,10 @@ +config COMMON_RESET_HI3660 + tristate "Hi3660 Reset Driver" + depends on ARCH_HISI || COMPILE_TEST + default ARCH_HISI + help + Build the Hisilicon Hi3660 reset driver. + config COMMON_RESET_HI6220 tristate "Hi6220 Reset Driver" depends on ARCH_HISI || COMPILE_TEST diff --git a/drivers/reset/hisilicon/Makefile b/drivers/reset/hisilicon/Makefile index df511f5..57e9893 100644 --- a/drivers/reset/hisilicon/Makefile +++ b/drivers/reset/hisilicon/Makefile @@ -1,2 +1,3 @@ obj-y += reset.o +obj-$(CONFIG_COMMON_RESET_HI3660) += reset-hi3660.o obj-$(CONFIG_COMMON_RESET_HI6220) += hi6220_reset.o diff --git a/drivers/reset/hisilicon/reset-hi3660.c b/drivers/reset/hisilicon/reset-hi3660.c new file mode 100644 index 0000000..7da3153 --- /dev/null +++ b/drivers/reset/hisilicon/reset-hi3660.c @@ -0,0 +1,78 @@ +/* + * Copyright (c) 2016-2017 Linaro Ltd. + * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ +#include +#include +#include +#include +#include + +#include "reset.h" + +static const struct hisi_reset_channel_data hi3660_iomcu_rst[] = { + [HI3660_RST_I2C0] = HISI_RST_SEP(0x20, 3), + [HI3660_RST_I2C1] = HISI_RST_SEP(0x20, 4), + [HI3660_RST_I2C2] = HISI_RST_SEP(0x20, 5), + [HI3660_RST_I2C6] = HISI_RST_SEP(0x20, 27), +}; + +static struct hisi_reset_controller_data hi3660_iomcu_controller = { + .nr_channels = ARRAY_SIZE(hi3660_iomcu_rst), + .channels = hi3660_iomcu_rst, +}; + +static const struct hisi_reset_channel_data hi3660_crgctrl_rst[] = { + [HI3660_RST_I2C3] = HISI_RST_SEP(0x78, 7), + [HI3660_RST_I2C4] = HISI_RST_SEP(0x78, 27), + [HI3660_RST_I2C7] = HISI_RST_SEP(0x60, 14), + [HI3660_RST_SD] = HISI_RST_SEP(0x90, 18), + [HI3660_RST_SDIO] = HISI_RST_SEP(0x90, 20), + [HI3660_RST_UFS] = HISI_RST_SEP(0x84, 12), + [HI3660_RST_UFS_ASSERT] = HISI_RST_SEP(0x84, 7), + [HI3660_RST_PCIE_SYS] = HISI_RST_SEP(0x84, 26), + [HI3660_RST_PCIE_PHY] = HISI_RST_SEP(0x84, 27), + [HI3660_RST_PCIE_BUS] = HISI_RST_SEP(0x84, 31), + [HI3660_RST_USB3OTG_PHY] = HISI_RST_SEP(0x90, 3), + [HI3660_RST_USB3OTG] = HISI_RST_SEP(0x90, 5), + [HI3660_RST_USB3OTG_32K] = HISI_RST_SEP(0x90, 6), + [HI3660_RST_USB3OTG_AHB] = HISI_RST_SEP(0x90, 7), + [HI3660_RST_USB3OTG_MUX] = HISI_RST_SEP(0x90, 8), +}; + +static struct hisi_reset_controller_data hi3660_crgctrl_controller = { + .nr_channels = ARRAY_SIZE(hi3660_crgctrl_rst), + .channels = hi3660_crgctrl_rst, +}; + +static const struct of_device_id hi3660_reset_match[] = { + { .compatible = "hisilicon,hi3660-reset-crgctrl", + .data = &hi3660_crgctrl_controller, }, + { .compatible = "hisilicon,hi3660-reset-iomcu", + .data = &hi3660_iomcu_controller, }, + {}, +}; +MODULE_DEVICE_TABLE(of, hi3660_reset_match); + +static struct platform_driver hi3660_reset_driver = { + .probe = hisi_reset_probe, + .driver = { + .name = "reset-hi3660", + .of_match_table = hi3660_reset_match, + }, +}; + +static int __init hi3660_reset_init(void) +{ + return platform_driver_register(&hi3660_reset_driver); +} +arch_initcall(hi3660_reset_init); + +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:hi3660-reset"); +MODULE_DESCRIPTION("HiSilicon Hi3660 Reset Driver"); diff --git a/include/dt-bindings/reset/hisi,hi3660-resets.h b/include/dt-bindings/reset/hisi,hi3660-resets.h new file mode 100644 index 0000000..a65f382 --- /dev/null +++ b/include/dt-bindings/reset/hisi,hi3660-resets.h @@ -0,0 +1,38 @@ +/* + * Copyright (c) 2016-2017 Linaro Ltd. + * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef _DT_BINDINGS_RESET_CONTROLLER_HI3660 +#define _DT_BINDINGS_RESET_CONTROLLER_HI3660 + +/* reset in iomcu */ +#define HI3660_RST_I2C0 0 +#define HI3660_RST_I2C1 1 +#define HI3660_RST_I2C2 2 +#define HI3660_RST_I2C6 3 + + +/* reset in crgctrl */ +#define HI3660_RST_I2C3 0 +#define HI3660_RST_I2C4 1 +#define HI3660_RST_I2C7 2 +#define HI3660_RST_SD 3 +#define HI3660_RST_SDIO 4 +#define HI3660_RST_UFS 5 +#define HI3660_RST_UFS_ASSERT 6 +#define HI3660_RST_PCIE_SYS 7 +#define HI3660_RST_PCIE_PHY 8 +#define HI3660_RST_PCIE_BUS 9 +#define HI3660_RST_USB3OTG_PHY 10 +#define HI3660_RST_USB3OTG 11 +#define HI3660_RST_USB3OTG_32K 12 +#define HI3660_RST_USB3OTG_AHB 13 +#define HI3660_RST_USB3OTG_MUX 14 + +#endif /*_DT_BINDINGS_RESET_CONTROLLER_HI3660*/