From patchwork Tue Nov 22 09:44:21 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Lezcano X-Patchwork-Id: 9440701 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id C834E60235 for ; Tue, 22 Nov 2016 09:48:28 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CDDDE284AF for ; Tue, 22 Nov 2016 09:48:28 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C126A284B5; Tue, 22 Nov 2016 09:48:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED, T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id C9D4D284AF for ; Tue, 22 Nov 2016 09:48:26 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1c97fH-00019U-Tz; Tue, 22 Nov 2016 09:46:59 +0000 Received: from mail-wj0-x234.google.com ([2a00:1450:400c:c01::234]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1c97dY-0006s9-0x for linux-arm-kernel@lists.infradead.org; Tue, 22 Nov 2016 09:45:26 +0000 Received: by mail-wj0-x234.google.com with SMTP id mp19so39722991wjc.1 for ; Tue, 22 Nov 2016 01:44:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=7xtzavZIXXmcSBY5/yJ1hBbT/T9kahoauHb7Tcj1/pQ=; b=LiWCMJQhxH1fEv3q+XH6LheGND9rQQmLJlZhuPnTqfXh6miy3bFGdOhcMKFzRQb4HF VeTVoEN92Egrse1O72fgTNJ7Rshc+jZMXo5+yg1s2/BpQZZWVV7cI5yVCO58Tci6vxPN hVCERasOp4p7243Up5DpMKqDhPxXXzh91MDiw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=7xtzavZIXXmcSBY5/yJ1hBbT/T9kahoauHb7Tcj1/pQ=; b=dA4K81nxWD/TZb3QeE4kh7kVYDXxZdLb2o6nUNiB45B8856WpaC9Qi660Nw6ETFuV0 KtFnOlMrtR8+SRrIsK9VAfwwBVpnwQ2UpWGpa7hPMtuS9yFDEkdKtPhWL3b5/mnqLaux HnseR2thOrVGhftZRxRJztRpXrMOsgiJt2t5rAX4MxmAe+zy8b2rlm+UIqulD4gMjn8k bTax8hLQfRSOl5DunYObiPf3kzq2rnEmKzfPYd2CKtWwFv54g91JbIkVulnwNOOpCI7y X7s9aQ172cu2OGjF/+BTzCuO3HZQAcGxQ6cHqYcZ+SRJI3wi2EFzoe2ukRyq+SJZoc6I QXMw== X-Gm-Message-State: AKaTC00kXDjrxB/xIa0Fht9O8HO20CQxfcZL1OLnmI5EHQExTh9k+AeywX5Ycqu1AWUbQ+Bz X-Received: by 10.194.205.73 with SMTP id le9mr13210304wjc.31.1479807889553; Tue, 22 Nov 2016 01:44:49 -0800 (PST) Received: from localhost.localdomain ([2a01:e35:879a:6cd0:d4cd:7489:29a3:d5ed]) by smtp.gmail.com with ESMTPSA id ab10sm29789450wjc.45.2016.11.22.01.44.48 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 22 Nov 2016 01:44:49 -0800 (PST) From: Daniel Lezcano To: tglx@linutronix.de Subject: [PATCH 1/4] clocksource/drivers/arm_arch_timer: Don't assume clock runs in suspend Date: Tue, 22 Nov 2016 10:44:21 +0100 Message-Id: <1479807866-6957-1-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <20161122094300.GA2017@mai> References: <20161122094300.GA2017@mai> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20161122_014512_571314_708A48B1 X-CRM114-Status: GOOD ( 17.18 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Marc Zyngier , Brian Norris , Will Deacon , linux-kernel@vger.kernel.org, Douglas Anderson , Scott Wood , Rob Herring , "moderated list:ARM ARCHITECTED TIMER DRIVER" MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Brian Norris The ARM specifies that the system counter "must be implemented in an always-on power domain," and so we try to use the counter as a source of timekeeping across suspend/resume. Unfortunately, some SoCs (e.g., Rockchip's RK3399) do not keep the counter ticking properly when switched from their high-power clock to the lower-power clock used in system suspend. Support this quirk by adding a new device tree property. Signed-off-by: Brian Norris Reviewed-by: Douglas Anderson Acked-by: Marc Zyngier Signed-off-by: Daniel Lezcano Acked-by: Rob Herring --- Documentation/devicetree/bindings/arm/arch_timer.txt | 5 +++++ drivers/clocksource/arm_arch_timer.c | 9 ++++++++- 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/arm/arch_timer.txt b/Documentation/devicetree/bindings/arm/arch_timer.txt index ef5fbe9..ad440a2 100644 --- a/Documentation/devicetree/bindings/arm/arch_timer.txt +++ b/Documentation/devicetree/bindings/arm/arch_timer.txt @@ -38,6 +38,11 @@ to deliver its interrupts via SPIs. architecturally-defined reset values. Only supported for 32-bit systems which follow the ARMv7 architected reset values. +- arm,no-tick-in-suspend : The main counter does not tick when the system is in + low-power system suspend on some SoCs. This behavior does not match the + Architecture Reference Manual's specification that the system counter "must + be implemented in an always-on power domain." + Example: diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 73c487d..a2503db 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -81,6 +81,7 @@ static struct clock_event_device __percpu *arch_timer_evt; static enum ppi_nr arch_timer_uses_ppi = VIRT_PPI; static bool arch_timer_c3stop; static bool arch_timer_mem_use_virtual; +static bool arch_counter_suspend_stop; static bool evtstrm_enable = IS_ENABLED(CONFIG_ARM_ARCH_TIMER_EVTSTREAM); @@ -576,7 +577,7 @@ static struct clocksource clocksource_counter = { .rating = 400, .read = arch_counter_read, .mask = CLOCKSOURCE_MASK(56), - .flags = CLOCK_SOURCE_IS_CONTINUOUS | CLOCK_SOURCE_SUSPEND_NONSTOP, + .flags = CLOCK_SOURCE_IS_CONTINUOUS, }; static struct cyclecounter cyclecounter = { @@ -616,6 +617,8 @@ static void __init arch_counter_register(unsigned type) arch_timer_read_counter = arch_counter_get_cntvct_mem; } + if (!arch_counter_suspend_stop) + clocksource_counter.flags |= CLOCK_SOURCE_SUSPEND_NONSTOP; start_count = arch_timer_read_counter(); clocksource_register_hz(&clocksource_counter, arch_timer_rate); cyclecounter.mult = clocksource_counter.mult; @@ -907,6 +910,10 @@ static int __init arch_timer_of_init(struct device_node *np) of_property_read_bool(np, "arm,cpu-registers-not-fw-configured")) arch_timer_uses_ppi = PHYS_SECURE_PPI; + /* On some systems, the counter stops ticking when in suspend. */ + arch_counter_suspend_stop = of_property_read_bool(np, + "arm,no-tick-in-suspend"); + return arch_timer_init(); } CLOCKSOURCE_OF_DECLARE(armv7_arch_timer, "arm,armv7-timer", arch_timer_of_init);