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[73.19.0.61]) by smtp.gmail.com with ESMTPSA id w5sm28142637pfl.31.2016.12.05.06.38.56 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 05 Dec 2016 06:38:58 -0800 (PST) From: Andrey Smirnov To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 1/3] ARM: dts: vf610-zii-dev-rev-b: Remove leftover PWM pingroup Date: Mon, 5 Dec 2016 06:38:34 -0800 Message-Id: <1480948716-17744-1-git-send-email-andrew.smirnov@gmail.com> X-Mailer: git-send-email 2.5.5 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20161205_063920_624316_07CAF8E5 X-CRM114-Status: UNSURE ( 9.19 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, andrew@lunn.ch, Andrey Smirnov , Russell King , Stefan Agner , linux-kernel@vger.kernel.org, Rob Herring , Sascha Hauer , Shawn Guo , cphealy@gmail.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Remove pwm0grp since it is: a) Not referenced anywhere in the DTS file (unlike Tower board it is based on, this board does not use/expose FTM0) b) Configures PTB2 and PTB3 in a way that contradicts pinctrl-mdio-mux Signed-off-by: Andrey Smirnov --- Changes since v2: - None arch/arm/boot/dts/vf610-zii-dev-rev-b.dts | 9 --------- 1 file changed, 9 deletions(-) diff --git a/arch/arm/boot/dts/vf610-zii-dev-rev-b.dts b/arch/arm/boot/dts/vf610-zii-dev-rev-b.dts index fa19cfd..2210811 100644 --- a/arch/arm/boot/dts/vf610-zii-dev-rev-b.dts +++ b/arch/arm/boot/dts/vf610-zii-dev-rev-b.dts @@ -677,15 +677,6 @@ >; }; - pinctrl_pwm0: pwm0grp { - fsl,pins = < - VF610_PAD_PTB0__FTM0_CH0 0x1582 - VF610_PAD_PTB1__FTM0_CH1 0x1582 - VF610_PAD_PTB2__FTM0_CH2 0x1582 - VF610_PAD_PTB3__FTM0_CH3 0x1582 - >; - }; - pinctrl_qspi0: qspi0grp { fsl,pins = < VF610_PAD_PTD7__QSPI0_B_QSCK 0x31c3