From patchwork Mon Jan 16 10:08:30 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Zhong X-Patchwork-Id: 9518439 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 8FE7E601C3 for ; Mon, 16 Jan 2017 10:16:55 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5B02528441 for ; Mon, 16 Jan 2017 10:16:55 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4E31F28447; Mon, 16 Jan 2017 10:16:55 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.5 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, URIBL_BLACK autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 06E5028441 for ; Mon, 16 Jan 2017 10:16:55 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1cT4LO-0007qE-K6; Mon, 16 Jan 2017 10:16:54 +0000 Received: from mail-pg0-f65.google.com ([74.125.83.65]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1cT4ES-0000m5-7x; Mon, 16 Jan 2017 10:09:52 +0000 Received: by mail-pg0-f65.google.com with SMTP id 194so5060078pgd.0; Mon, 16 Jan 2017 02:09:27 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=jsF2hWG/6febJZdTN8mD3UipDUwojxVRBOOGk/9kkjk=; b=Qf7koHlFM7OHNqyb6kFYw5q8lXd6EgLg17ZLFsqSPCYDKmdP3dsnJmJs90B7RxXQFc wRT78Ivb/G2GPwMCLBtoDtE27rVTkx0CjnmIhhlzituFhtJABNX6CIrNdzXy9p9AtCIb Vlq0BGpqO9mmDS6opBLf1NeQUj4w0n1+v+iphdcwGsmihuMzbVJrxVy8LMr5UISJLohy +sIZMJdFTMYm+y7XpfcHMnMWKuWfOIJfk9lUu04v8SLO2GdGtFCi3rMw9nTR+tNKOxI+ LWs/HsUMYfxT/Yb4Sv02MODbyZMR3zsUm5g0FmdofkNYZhuq5TH/9Vvfz5W7+Pgahvvm +idg== X-Gm-Message-State: AIkVDXJEV5hyOot4A47v0AQcPC4v2uwt8ycaNZ879QuTB6IEBBdNjg4KXP+dd1teQeixxw== X-Received: by 10.99.146.76 with SMTP id s12mr38741009pgn.8.1484561367200; Mon, 16 Jan 2017 02:09:27 -0800 (PST) Received: from localhost.localdomain ([103.29.142.67]) by smtp.gmail.com with ESMTPSA id k78sm46351848pfb.93.2017.01.16.02.09.23 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 16 Jan 2017 02:09:26 -0800 (PST) From: Chris Zhong To: dianders@chromium.org, tfiga@chromium.org, heiko@sntech.de, yzq@rock-chips.com, mark.rutland@arm.com, devicetree@vger.kernel.org, robh+dt@kernel.org, galak@codeaurora.org, pawel.moll@arm.com, seanpaul@chromium.org Subject: [PATCH v2 10/11] drm/rockchip/dsi: fix phy clk lane stop state timeout Date: Mon, 16 Jan 2017 18:08:30 +0800 Message-Id: <1484561311-494-11-git-send-email-zyw@rock-chips.com> X-Mailer: git-send-email 2.6.3 In-Reply-To: <1484561311-494-1-git-send-email-zyw@rock-chips.com> References: <1484561311-494-1-git-send-email-zyw@rock-chips.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170116_020944_547805_CD12EC43 X-CRM114-Status: UNSURE ( 9.68 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Airlie , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, Chris Zhong , linux-arm-kernel@lists.infradead.org, Mark Yao MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Before phy init, the detection of phy state should be controlled manually. After that, we can switch the detection to hardward, it is automatic. Hence move PHY_TXREQUESTCLKHS setting to the end of phy init. Signed-off-by: Chris Zhong --- drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c index f50909e..9dfa73d 100644 --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c @@ -475,6 +475,8 @@ static int dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi) dev_err(dsi->dev, "failed to wait for phy clk lane stop state\n"); + dsi_write(dsi, DSI_LPCLK_CTRL, PHY_TXREQUESTCLKHS); + phy_init_end: if (!IS_ERR(dsi->phy_cfg_clk)) clk_disable_unprepare(dsi->phy_cfg_clk); @@ -721,7 +723,6 @@ static void dw_mipi_dsi_init(struct dw_mipi_dsi *dsi) | PHY_RSTZ | PHY_SHUTDOWNZ); dsi_write(dsi, DSI_CLKMGR_CFG, TO_CLK_DIVIDSION(10) | TX_ESC_CLK_DIVIDSION(7)); - dsi_write(dsi, DSI_LPCLK_CTRL, PHY_TXREQUESTCLKHS); } static void dw_mipi_dsi_dpi_config(struct dw_mipi_dsi *dsi,