From patchwork Wed Jan 18 06:00:09 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chunfeng Yun X-Patchwork-Id: 9522723 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 10A3B601B7 for ; Wed, 18 Jan 2017 06:01:23 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0085F28441 for ; Wed, 18 Jan 2017 06:01:23 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E7C482849B; Wed, 18 Jan 2017 06:01:22 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 783DF28441 for ; Wed, 18 Jan 2017 06:01:22 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1cTjJ7-00080i-Iq; Wed, 18 Jan 2017 06:01:17 +0000 Received: from [210.61.82.183] (helo=mailgw01.mediatek.com) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1cTjIa-0007Ec-UP; Wed, 18 Jan 2017 06:00:48 +0000 Received: from mtkhts09.mediatek.inc [(172.21.101.70)] by mailgw01.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 221349389; Wed, 18 Jan 2017 14:00:19 +0800 Received: from mhfsdcap03.mhfswrd (10.17.3.153) by mtkhts09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 14.3.266.1; Wed, 18 Jan 2017 14:00:19 +0800 From: Chunfeng Yun To: Kishon Vijay Abraham I Subject: [RESEND PATCH 1/6] phy: phy-mt65xx-usb3: add reference clock of usb3 analog phy Date: Wed, 18 Jan 2017 14:00:09 +0800 Message-ID: <1484719214-11989-1-git-send-email-chunfeng.yun@mediatek.com> X-Mailer: git-send-email 1.7.9.5 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170117_220045_114891_01F4DD12 X-CRM114-Status: GOOD ( 12.77 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Felipe Balbi , Ian Campbell , linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, Chunfeng Yun , Rob Herring , linux-mediatek@lists.infradead.org, Matthias Brugger , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP usually, the reference clock of usb3 analog phy comes from 26M oscillator directly, but some SoCs are not, add it for compatibility. Signed-off-by: Chunfeng Yun --- drivers/phy/phy-mt65xx-usb3.c | 36 ++++++++++++++++++++++++++++-------- 1 file changed, 28 insertions(+), 8 deletions(-) diff --git a/drivers/phy/phy-mt65xx-usb3.c b/drivers/phy/phy-mt65xx-usb3.c index d972067..fc9a4f0 100644 --- a/drivers/phy/phy-mt65xx-usb3.c +++ b/drivers/phy/phy-mt65xx-usb3.c @@ -149,7 +149,8 @@ struct mt65xx_phy_instance { struct mt65xx_u3phy { struct device *dev; void __iomem *sif_base; /* include sif2, but exclude port's */ - struct clk *u3phya_ref; /* reference clock of usb3 anolog phy */ + struct clk *u2ref_clk; /* reference clock of u2 analog phy */ + struct clk *u3ref_clk; /* reference clock of u3 analog phy */ const struct mt65xx_phy_pdata *pdata; struct mt65xx_phy_instance **phys; int nphys; @@ -429,11 +430,17 @@ static int mt65xx_phy_init(struct phy *phy) { struct mt65xx_phy_instance *instance = phy_get_drvdata(phy); struct mt65xx_u3phy *u3phy = dev_get_drvdata(phy->dev.parent); + struct clk *ref_clk; int ret; - ret = clk_prepare_enable(u3phy->u3phya_ref); + if (instance->type == PHY_TYPE_USB2) + ref_clk = u3phy->u2ref_clk; + else + ref_clk = u3phy->u3ref_clk; + + ret = clk_prepare_enable(ref_clk); if (ret) { - dev_err(u3phy->dev, "failed to enable u3phya_ref\n"); + dev_err(u3phy->dev, "failed to enable ref clk\n"); return ret; } @@ -464,9 +471,16 @@ static int mt65xx_phy_exit(struct phy *phy) { struct mt65xx_phy_instance *instance = phy_get_drvdata(phy); struct mt65xx_u3phy *u3phy = dev_get_drvdata(phy->dev.parent); + struct clk *ref_clk; phy_instance_exit(u3phy, instance); - clk_disable_unprepare(u3phy->u3phya_ref); + + if (instance->type == PHY_TYPE_USB2) + ref_clk = u3phy->u2ref_clk; + else + ref_clk = u3phy->u3ref_clk; + + clk_disable_unprepare(ref_clk); return 0; } @@ -566,10 +580,16 @@ static int mt65xx_u3phy_probe(struct platform_device *pdev) return PTR_ERR(u3phy->sif_base); } - u3phy->u3phya_ref = devm_clk_get(dev, "u3phya_ref"); - if (IS_ERR(u3phy->u3phya_ref)) { - dev_err(dev, "error to get u3phya_ref\n"); - return PTR_ERR(u3phy->u3phya_ref); + u3phy->u2ref_clk = devm_clk_get(dev, "u2ref_clk"); + if (IS_ERR(u3phy->u2ref_clk)) { + dev_err(dev, "failed to get u2ref_clk\n"); + return PTR_ERR(u3phy->u2ref_clk); + } + + u3phy->u3ref_clk = devm_clk_get(dev, "u3ref_clk"); + if (IS_ERR(u3phy->u3ref_clk)) { + dev_err(dev, "failed to get u3ref_clk\n"); + return PTR_ERR(u3phy->u3ref_clk); } port = 0;