From patchwork Wed Jan 18 14:20:46 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 9523981 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 0B088601B7 for ; Wed, 18 Jan 2017 14:22:06 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id ED7F7285EE for ; Wed, 18 Jan 2017 14:22:05 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E00FC285F4; Wed, 18 Jan 2017 14:22:05 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 9B89C285EE for ; Wed, 18 Jan 2017 14:22:05 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1cTr7k-0006xw-NG; Wed, 18 Jan 2017 14:22:04 +0000 Received: from mail-wm0-x230.google.com ([2a00:1450:400c:c09::230]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1cTr7G-00063F-II for linux-arm-kernel@lists.infradead.org; Wed, 18 Jan 2017 14:21:37 +0000 Received: by mail-wm0-x230.google.com with SMTP id c206so27475739wme.0 for ; Wed, 18 Jan 2017 06:21:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=QznOOmMfKpnz+9Mx6YYmOSROpliZ3MGwR5WTj2skqsY=; b=I1UW+vz1dJDualGRATGBoDYMbYVDNyCwHxqDxkhCwJaedR1phnoCvMz7JFbAJiAdvB Zt4BfLeyPxhsIMrDV1u0JfOXr5KqL7ttAcc/iDIbW3B6oUFbx679Jje2pMcP6g6GQUiq h6/5ikS0t61bzEtEacXddpNBgVjjq3QKYZi3g= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=QznOOmMfKpnz+9Mx6YYmOSROpliZ3MGwR5WTj2skqsY=; b=fF37OcHClCOpGxegt59YxLOuz8YpVIhxXecSJG9L9/i/qsfyEP+e3NoPG69rUTenqi Yd/bIDUlLFizMl0YA7o5yiYzvykxz4nu4YB+C10K6x5BpnJq1QOcti2t1VrJMa+PQFLZ WTW+/50o7BAQwbdoWxgf0txyo1JQtTRYPYjlB4uUiUoAuzUxS+7PMusmla8y+T0Gx49y qlqkhQ7V/Nzw3MFlZwdfwjjcmoukFzKCWhrg7Gv1pF1pqTXvr6KTiIXAcWZZrUP0WWjc G24Cd1+ZNkOsJ87U8v5LwsPvSOS9Ybod6q4Oetv0NYu31IA+WGQynw5xUCrFrum/pu9O /Aig== X-Gm-Message-State: AIkVDXIB66pUWwhMyoUfYZmwt4PqXWLZVLQEwgpQJ9Wc97eCLaJJNMNejInoU85nEdHFeGQO X-Received: by 10.28.222.11 with SMTP id v11mr20013392wmg.1.1484749272688; Wed, 18 Jan 2017 06:21:12 -0800 (PST) Received: from lmenx321.st.com. ([80.215.202.29]) by smtp.gmail.com with ESMTPSA id f126sm45616924wme.22.2017.01.18.06.21.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 18 Jan 2017 06:21:12 -0800 (PST) From: Benjamin Gaignard X-Google-Original-From: Benjamin Gaignard To: lee.jones@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, alexandre.torgue@st.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, thierry.reding@gmail.com, linux-pwm@vger.kernel.org, jic23@kernel.org, knaack.h@gmx.de, lars@metafoo.de, pmeerw@pmeerw.net, linux-iio@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v8 3/8] PWM: add pwm-stm32 DT bindings Date: Wed, 18 Jan 2017 15:20:46 +0100 Message-Id: <1484749251-14445-4-git-send-email-benjamin.gaignard@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1484749251-14445-1-git-send-email-benjamin.gaignard@st.com> References: <1484749251-14445-1-git-send-email-benjamin.gaignard@st.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170118_062134_917902_87E8FBF3 X-CRM114-Status: GOOD ( 13.76 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linaro-kernel@lists.linaro.org, Benjamin Gaignard , arnaud.pouliquen@st.com, benjamin.gaignard@linaro.org, gerald.baeza@st.com, fabrice.gasnier@st.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Define bindings for pwm-stm32 version 8: - reword st,breakinput description. version 6: - change st,breakinput parameter format to make it usuable on stm32f7 too. version 2: - use parameters instead of compatible of handle the hardware configuration Signed-off-by: Benjamin Gaignard Acked-by: Rob Herring Acked-by: Thierry Reding --- .../devicetree/bindings/pwm/pwm-stm32.txt | 35 ++++++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/pwm-stm32.txt diff --git a/Documentation/devicetree/bindings/pwm/pwm-stm32.txt b/Documentation/devicetree/bindings/pwm/pwm-stm32.txt new file mode 100644 index 0000000..6dd0403 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/pwm-stm32.txt @@ -0,0 +1,35 @@ +STMicroelectronics STM32 Timers PWM bindings + +Must be a sub-node of an STM32 Timers device tree node. +See ../mfd/stm32-timers.txt for details about the parent node. + +Required parameters: +- compatible: Must be "st,stm32-pwm". +- pinctrl-names: Set to "default". +- pinctrl-0: List of phandles pointing to pin configuration nodes for PWM module. + For Pinctrl properties see ../pinctrl/pinctrl-bindings.txt + +Optional parameters: +- st,breakinput: One or two to describe break input configurations. + "index" indicates on which break input (0 or 1) the configuration + should be applied. + "level" gives the active level (0=low or 1=high) of the input signal + for this configuration. + "filter" gives the filtering value to be applied. + +Example: + timers@40010000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32-timers"; + reg = <0x40010000 0x400>; + clocks = <&rcc 0 160>; + clock-names = "clk_int"; + + pwm { + compatible = "st,stm32-pwm"; + pinctrl-0 = <&pwm1_pins>; + pinctrl-names = "default"; + st,breakinput = <0 1 5>; + }; + };