From patchwork Wed Jan 25 08:19:22 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Crystal Wood X-Patchwork-Id: 9536523 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 186FA6046A for ; Wed, 25 Jan 2017 08:20:36 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 058AE26E77 for ; Wed, 25 Jan 2017 08:20:36 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id EDE9A27E5A; Wed, 25 Jan 2017 08:20:35 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00 autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id A1E7726E77 for ; Wed, 25 Jan 2017 08:20:35 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1cWIoi-0005XI-HA; Wed, 25 Jan 2017 08:20:32 +0000 Received: from host.buserror.net ([209.198.135.123]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1cWIoA-0003aR-2A for linux-arm-kernel@lists.infradead.org; Wed, 25 Jan 2017 08:19:59 +0000 Received: from c-50-171-225-118.hsd1.mn.comcast.net ([50.171.225.118] helo=snotra.buserror.net) by host.buserror.net with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_CBC_SHA256:128) (Exim 4.84_2) (envelope-from ) id 1cWInk-0003gV-B4; Wed, 25 Jan 2017 02:19:32 -0600 From: Scott Wood To: Michael Turquette , Stephen Boyd , Shawn Guo Date: Wed, 25 Jan 2017 02:19:22 -0600 Message-Id: <1485332363-8434-2-git-send-email-oss@buserror.net> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1485332363-8434-1-git-send-email-oss@buserror.net> References: <1485332363-8434-1-git-send-email-oss@buserror.net> X-SA-Exim-Connect-IP: 50.171.225.118 X-SA-Exim-Mail-From: oss@buserror.net Subject: [PATCH 2/3] arm64: dts: ls1012a: Add coreclk X-SA-Exim-Version: 4.2.1 (built Mon, 26 Dec 2011 16:57:07 +0000) X-SA-Exim-Scanned: Yes (on host.buserror.net) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170125_001958_178542_D81E755D X-CRM114-Status: UNSURE ( 7.38 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Z.Q. Hou" , Scott Wood , "Y.T. Tang" , "Y.B. Lu" , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP ls1012a has separate input root clocks for core PLLs versus the platform PLL, with the latter described as sysclk in the hw docs. Signed-off-by: Scott Wood --- Note that current versions of U-Boot are blindly updating the frequency of all fixed-clock nodes. That needs to be fixed for the split input frequency to work properly, but until U-Boot is fixed this change doesn't make anything worse than it already was. arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi index cffebb4..515f8488 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi @@ -66,10 +66,17 @@ sysclk: sysclk { compatible = "fixed-clock"; #clock-cells = <0>; - clock-frequency = <100000000>; + clock-frequency = <125000000>; clock-output-names = "sysclk"; }; + coreclk: coreclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <100000000>; + clock-output-names = "coreclk"; + }; + timer { compatible = "arm,armv8-timer"; interrupts = <1 13 IRQ_TYPE_LEVEL_LOW>,/* Physical Secure PPI */ @@ -124,7 +131,8 @@ compatible = "fsl,ls1012a-clockgen"; reg = <0x0 0x1ee1000 0x0 0x1000>; #clock-cells = <2>; - clocks = <&sysclk>; + clocks = <&sysclk &coreclk>; + clock-names = "sysclk", "coreclk"; }; i2c0: i2c@2180000 {