From patchwork Wed Feb 8 23:14:38 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Lezcano X-Patchwork-Id: 9563749 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id D30286020F for ; Wed, 8 Feb 2017 23:17:29 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8C5172852B for ; Wed, 8 Feb 2017 23:17:29 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 80EF528532; Wed, 8 Feb 2017 23:17:29 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, T_DKIM_INVALID autolearn=no version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 8DF7A2852B for ; Wed, 8 Feb 2017 23:17:28 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1cbbUH-0002FB-1O; Wed, 08 Feb 2017 23:17:21 +0000 Received: from mail-wr0-f175.google.com ([209.85.128.175]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1cbbUB-0002Db-5D for linux-arm-kernel@lists.infradead.org; Wed, 08 Feb 2017 23:17:18 +0000 Received: by mail-wr0-f175.google.com with SMTP id o16so70767671wra.1 for ; Wed, 08 Feb 2017 15:16:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=/pVK3WleTRXQIKdGHqODeuwB6fNXRwIGe4OLb8VfJ2g=; b=YbhV15oG6c1QcXvKDwyupH/d/UulnUErxCPcZH5SC+yZLTRFoQlSjyEdi6I/7EecPo psKvgHQ9xBiKD03FHDUz06NTYD6JVCWf+nh5I4hofWQUvB31sewB8dNtSr5IKw6B1ZK8 yCI1kAaCEz5GZwrwMyJjTrSN6BScRwSpiFBG8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=/pVK3WleTRXQIKdGHqODeuwB6fNXRwIGe4OLb8VfJ2g=; b=XyYaKaZO+SwKMMPTaZxlfqSQKY0K4VMY5eTX421Kl/Taxg41C1qjXxIHQZ9FzsZRae xAxUiKw7v89OOpns9mUypvTzTZ3ccF/6ECckRUQm65ZSCESWUw8UWFnENojxA0DaNGn9 taG3TOxesD0iMUpJ8ZD0Psf1xfCoPvs5b052pzTS5mCmmOSIR4EQ+HW6qfhXRIXmzkrZ UebATrDarCv+TzEbPDCMdKtUktn2Zhw/B6DourskQWT0/UKfH32OoxqcU6tPvE//S4aZ AQuvPi/TRm3BDmNWulsSsh7iGUWAONhYhx1OkJi6fXyGBCYkvb/Yjcvt02RLwEKwLBF+ mRng== X-Gm-Message-State: AMke39l9gVG0DxQ/UVpUDY2/iNvj28ULLzgunUSId/qOGWAkybTrLvM2/QpxmbK0NRsk/aN1 X-Received: by 10.223.141.229 with SMTP id o92mr56509wrb.22.1486595752998; Wed, 08 Feb 2017 15:15:52 -0800 (PST) Received: from mai.lan ([2001:41d0:fe90:b800:3f16:bcf7:601c:a13b]) by smtp.gmail.com with ESMTPSA id u42sm15422821wrc.1.2017.02.08.15.15.51 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 08 Feb 2017 15:15:52 -0800 (PST) From: Daniel Lezcano To: tglx@linutronix.de Subject: [PATCH 04/10] clocksource/drivers/tcb_clksrc: Use 32 bit tcb as sched_clock Date: Thu, 9 Feb 2017 00:14:38 +0100 Message-Id: <1486595685-10232-4-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1486595685-10232-1-git-send-email-daniel.lezcano@linaro.org> References: <20170208231208.GB12695@mai> <1486595685-10232-1-git-send-email-daniel.lezcano@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170208_151715_363326_44E1CFCD X-CRM114-Status: GOOD ( 13.27 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Nicolas Ferre , David Engraf , "moderated list:ATMEL Timer Counter TC AND CLOCKSOURCE DRIVERS" , "open list:CLOCKSOURCE, CLOCKEVENT DRIVERS" MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: David Engraf On newer boards the TC can be read as single 32 bit value without locking. Thus the clock can be used as reference for sched_clock which is much more accurate than the jiffies implementation. Tested on a Atmel SAMA5D2 board. Signed-off-by: David Engraf Acked-by: Nicolas Ferre Signed-off-by: Daniel Lezcano --- drivers/clocksource/tcb_clksrc.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/drivers/clocksource/tcb_clksrc.c b/drivers/clocksource/tcb_clksrc.c index d4ca996..745844e 100644 --- a/drivers/clocksource/tcb_clksrc.c +++ b/drivers/clocksource/tcb_clksrc.c @@ -10,6 +10,7 @@ #include #include #include +#include /* @@ -56,11 +57,16 @@ static u64 tc_get_cycles(struct clocksource *cs) return (upper << 16) | lower; } -static u64 tc_get_cycles32(struct clocksource *cs) +static u32 tc_get_cv32(void) { return __raw_readl(tcaddr + ATMEL_TC_REG(0, CV)); } +static u64 tc_get_cycles32(struct clocksource *cs) +{ + return tc_get_cv32(); +} + static struct clocksource clksrc = { .name = "tcb_clksrc", .rating = 200, @@ -69,6 +75,11 @@ static struct clocksource clksrc = { .flags = CLOCK_SOURCE_IS_CONTINUOUS, }; +static u64 notrace tc_read_sched_clock(void) +{ + return tc_get_cv32(); +} + #ifdef CONFIG_GENERIC_CLOCKEVENTS struct tc_clkevt_device { @@ -339,6 +350,9 @@ static int __init tcb_clksrc_init(void) clksrc.read = tc_get_cycles32; /* setup ony channel 0 */ tcb_setup_single_chan(tc, best_divisor_idx); + + /* register sched_clock on chips with single 32 bit counter */ + sched_clock_register(tc_read_sched_clock, 32, divided_rate); } else { /* tclib will give us three clocks no matter what the * underlying platform supports.