diff mbox

[DO,NOT,MERGE,5/6] ARM: dts: omap4: add some sample clkctrl data

Message ID 1486992157-10673-6-git-send-email-t-kristo@ti.com (mailing list archive)
State New, archived
Headers show

Commit Message

Tero Kristo Feb. 13, 2017, 1:22 p.m. UTC
Adds clkctrl nodes for cm_l4per and cm_abe as example. Peripherals using
clocks from these nodes are modified also.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/boot/dts/omap4.dtsi | 72 ++++++++++++++++++++++++++++++++++++++++++--
 1 file changed, 70 insertions(+), 2 deletions(-)

Comments

Tony Lindgren March 2, 2017, 5:45 p.m. UTC | #1
Hi,

* Tero Kristo <t-kristo@ti.com> [170213 05:24]:
> Adds clkctrl nodes for cm_l4per and cm_abe as example. Peripherals using
> clocks from these nodes are modified also.

Finally got around testing these. Looks like applying this patch
breaks things for devices not using the new clocks entry?

For example, SPI now breaks causing "imprecise external abort" during boot
at least on droid 4.

> --- a/arch/arm/boot/dts/omap4.dtsi
> +++ b/arch/arm/boot/dts/omap4.dtsi
> +				cm_l4per: cm_l4per@0 {

Above should be cm_l4per: cm_l4per@1400, right?

> +					compatible = "ti,omap4-cm";
> +					reg = <0x1400 0x200>;
> +					#address-cells = <1>;
> +					#size-cells = <1>;
> +					ranges = <0 0x1400 0x200>;
> +
> +					cm_l4per_clkctrl: cm_l4per_clkctrl@20 {
> +						compatible = "ti,omap4-clkctrl";
> +						reg = <0x20 0x1b0>;
> +						#clock-cells = <2>;
> +					};
> +				};

You should update the binding doc accordingly if the "cm_l4per@0" node
there is not needed. I also noticed the binding doc still has
"#clock-cells = <4>" while it should be 2.

Regards,

Tony
Tero Kristo March 2, 2017, 6:43 p.m. UTC | #2
On 02/03/17 19:45, Tony Lindgren wrote:
> Hi,
>
> * Tero Kristo <t-kristo@ti.com> [170213 05:24]:
>> Adds clkctrl nodes for cm_l4per and cm_abe as example. Peripherals using
>> clocks from these nodes are modified also.
>
> Finally got around testing these. Looks like applying this patch
> breaks things for devices not using the new clocks entry?
>
> For example, SPI now breaks causing "imprecise external abort" during boot
> at least on droid 4.

If SPI is under l4per, then yes, a breakage is expected. This will cause 
a conflict with the existing hwmod data, and the new clock data, 
effectively disabling the IP clocks during boot. This patch only 
converts part of the DT data to the new format, and as such is only 
suitable for testing purposes.

I will provide a full data conversion for the DT file for 4.11-rc.

>
>> --- a/arch/arm/boot/dts/omap4.dtsi
>> +++ b/arch/arm/boot/dts/omap4.dtsi
>> +				cm_l4per: cm_l4per@0 {
>
> Above should be cm_l4per: cm_l4per@1400, right?

Yea thats a bug in this test patch. Same issue with other nodes. DT 
compiler isn't too picky about these so it works even with wrong node name.

>
>> +					compatible = "ti,omap4-cm";
>> +					reg = <0x1400 0x200>;
>> +					#address-cells = <1>;
>> +					#size-cells = <1>;
>> +					ranges = <0 0x1400 0x200>;
>> +
>> +					cm_l4per_clkctrl: cm_l4per_clkctrl@20 {
>> +						compatible = "ti,omap4-clkctrl";
>> +						reg = <0x20 0x1b0>;
>> +						#clock-cells = <2>;
>> +					};
>> +				};
>
> You should update the binding doc accordingly if the "cm_l4per@0" node
> there is not needed. I also noticed the binding doc still has
> "#clock-cells = <4>" while it should be 2.

cm_l4per is somewhat redundant right now, but we want to add 
clockdomains under that one in the future. Or, we could just add those 
directly under parent node also (cm2 in this case.)

-Tero
Tony Lindgren March 2, 2017, 6:56 p.m. UTC | #3
* Tero Kristo <t-kristo@ti.com> [170302 10:45]:
> On 02/03/17 19:45, Tony Lindgren wrote:
> > Hi,
> > 
> > * Tero Kristo <t-kristo@ti.com> [170213 05:24]:
> > > Adds clkctrl nodes for cm_l4per and cm_abe as example. Peripherals using
> > > clocks from these nodes are modified also.
> > 
> > Finally got around testing these. Looks like applying this patch
> > breaks things for devices not using the new clocks entry?
> > 
> > For example, SPI now breaks causing "imprecise external abort" during boot
> > at least on droid 4.
> 
> If SPI is under l4per, then yes, a breakage is expected. This will cause a
> conflict with the existing hwmod data, and the new clock data, effectively
> disabling the IP clocks during boot. This patch only converts part of the DT
> data to the new format, and as such is only suitable for testing purposes.
> 
> I will provide a full data conversion for the DT file for 4.11-rc.

OK

> > > --- a/arch/arm/boot/dts/omap4.dtsi
> > > +++ b/arch/arm/boot/dts/omap4.dtsi
> > > +				cm_l4per: cm_l4per@0 {
> > 
> > Above should be cm_l4per: cm_l4per@1400, right?
> 
> Yea thats a bug in this test patch. Same issue with other nodes. DT compiler
> isn't too picky about these so it works even with wrong node name.
> 
> > 
> > > +					compatible = "ti,omap4-cm";
> > > +					reg = <0x1400 0x200>;
> > > +					#address-cells = <1>;
> > > +					#size-cells = <1>;
> > > +					ranges = <0 0x1400 0x200>;
> > > +
> > > +					cm_l4per_clkctrl: cm_l4per_clkctrl@20 {
> > > +						compatible = "ti,omap4-clkctrl";
> > > +						reg = <0x20 0x1b0>;
> > > +						#clock-cells = <2>;
> > > +					};
> > > +				};
> > 
> > You should update the binding doc accordingly if the "cm_l4per@0" node
> > there is not needed. I also noticed the binding doc still has
> > "#clock-cells = <4>" while it should be 2.
> 
> cm_l4per is somewhat redundant right now, but we want to add clockdomains
> under that one in the future. Or, we could just add those directly under
> parent node also (cm2 in this case.)

OK so probably best to add it to avoid tweaking the dts files again
later on.

Regards,

Tony
Tony Lindgren March 6, 2017, 10:45 p.m. UTC | #4
* Tero Kristo <t-kristo@ti.com> [170213 05:24]:
> @@ -304,6 +339,8 @@
>  			#gpio-cells = <2>;
>  			interrupt-controller;
>  			#interrupt-cells = <2>;
> +			clocks = <&cm_l4per_clkctrl OMAP4_GPIO2_CLKCTRL 0>;
> +			clock-names = "clkctrl";
>  		};
>  
>  		gpio3: gpio@48057000 {
> @@ -315,6 +352,8 @@
>  			#gpio-cells = <2>;
>  			interrupt-controller;
>  			#interrupt-cells = <2>;
> +			clocks = <&cm_l4per_clkctrl OMAP4_GPIO3_CLKCTRL 0>;
> +			clock-names = "clkctrl";
>  		};
>  
>  		gpio4: gpio@48059000 {
> @@ -384,6 +423,8 @@
>  			interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
>  			ti,hwmods = "uart1";
>  			clock-frequency = <48000000>;
> +			clocks = <&cm_l4per_clkctrl OMAP4_UART1_CLKCTRL 0>;
> +			clock-names = "clkctrl";
>  		};

BTW, one thing you might want to test also is that the opt clocks
can be mapped here properly for gpios to reset. That can be easily
tested by kexec booting on beagle-x15 where we currently get warnings
on kexec boot about GPIOs failing to reset.

Regards,

Tony
Tero Kristo March 7, 2017, 9:04 a.m. UTC | #5
On 07/03/17 00:45, Tony Lindgren wrote:
> * Tero Kristo <t-kristo@ti.com> [170213 05:24]:
>> @@ -304,6 +339,8 @@
>>  			#gpio-cells = <2>;
>>  			interrupt-controller;
>>  			#interrupt-cells = <2>;
>> +			clocks = <&cm_l4per_clkctrl OMAP4_GPIO2_CLKCTRL 0>;
>> +			clock-names = "clkctrl";
>>  		};
>>
>>  		gpio3: gpio@48057000 {
>> @@ -315,6 +352,8 @@
>>  			#gpio-cells = <2>;
>>  			interrupt-controller;
>>  			#interrupt-cells = <2>;
>> +			clocks = <&cm_l4per_clkctrl OMAP4_GPIO3_CLKCTRL 0>;
>> +			clock-names = "clkctrl";
>>  		};
>>
>>  		gpio4: gpio@48059000 {
>> @@ -384,6 +423,8 @@
>>  			interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
>>  			ti,hwmods = "uart1";
>>  			clock-frequency = <48000000>;
>> +			clocks = <&cm_l4per_clkctrl OMAP4_UART1_CLKCTRL 0>;
>> +			clock-names = "clkctrl";
>>  		};
>
> BTW, one thing you might want to test also is that the opt clocks
> can be mapped here properly for gpios to reset. That can be easily
> tested by kexec booting on beagle-x15 where we currently get warnings
> on kexec boot about GPIOs failing to reset.

Ok, I'll check that also. I am planning to post the cleanup series this 
week, and post the clkctrl support next, as this one needs some data 
changes + additional testing.

-Tero
Stephen Boyd March 7, 2017, 2:45 p.m. UTC | #6
On 02/13, Tero Kristo wrote:
> Adds clkctrl nodes for cm_l4per and cm_abe as example. Peripherals using
> @@ -131,27 +132,61 @@
>  			ranges = <0 0x4a000000 0x1000000>;
>  
>  			cm1: cm1@4000 {
> -				compatible = "ti,omap4-cm1";
> +				compatible = "ti,omap4-cm1", "simple-bus";
>  				reg = <0x4000 0x2000>;
> +				#address-cells = <1>;
> +				#size-cells = <1>;
> +				ranges = <0 0x4000 0x2000>;
>  
>  				cm1_clocks: clocks {
>  					#address-cells = <1>;
>  					#size-cells = <0>;
>  				};
>  
> +				cm_abe: cm_abe@0 {

The unit address should be 500 here.

> +					compatible = "ti,omap4-cm";
> +					reg = <0x500 0x100>;
> +					#address-cells = <1>;
> +					#size-cells = <1>;
> +					ranges = <0 0x500 0x100>;
> +
> +					cm_abe_clkctrl: cm_abe_clkctrl@20 {
> +						compatible = "ti,omap4-clkctrl";
> +						reg = <0x20 0x6c>;
> +						#clock-cells = <2>;
> +					};
> +				};
> +
>  				cm1_clockdomains: clockdomains {
>  				};
>  			};
>  
>  			cm2: cm2@8000 {
> -				compatible = "ti,omap4-cm2";
> +				compatible = "ti,omap4-cm2", "simple-bus";
>  				reg = <0x8000 0x3000>;
> +				#address-cells = <1>;
> +				#size-cells = <1>;
> +				ranges = <0 0x8000 0x3000>;
>  
>  				cm2_clocks: clocks {
>  					#address-cells = <1>;
>  					#size-cells = <0>;
>  				};
>  
> +				cm_l4per: cm_l4per@0 {

and 1400 here.

> +					compatible = "ti,omap4-cm";
> +					reg = <0x1400 0x200>;
> +					#address-cells = <1>;
> +					#size-cells = <1>;
> +					ranges = <0 0x1400 0x200>;
> +
> +					cm_l4per_clkctrl: cm_l4per_clkctrl@20 {
Tero Kristo March 7, 2017, 10:09 p.m. UTC | #7
On 07/03/17 16:45, Stephen Boyd wrote:
> On 02/13, Tero Kristo wrote:
>> Adds clkctrl nodes for cm_l4per and cm_abe as example. Peripherals using
>> @@ -131,27 +132,61 @@
>>  			ranges = <0 0x4a000000 0x1000000>;
>>
>>  			cm1: cm1@4000 {
>> -				compatible = "ti,omap4-cm1";
>> +				compatible = "ti,omap4-cm1", "simple-bus";
>>  				reg = <0x4000 0x2000>;
>> +				#address-cells = <1>;
>> +				#size-cells = <1>;
>> +				ranges = <0 0x4000 0x2000>;
>>
>>  				cm1_clocks: clocks {
>>  					#address-cells = <1>;
>>  					#size-cells = <0>;
>>  				};
>>
>> +				cm_abe: cm_abe@0 {
>
> The unit address should be 500 here.

True.

>> +					compatible = "ti,omap4-cm";
>> +					reg = <0x500 0x100>;
>> +					#address-cells = <1>;
>> +					#size-cells = <1>;
>> +					ranges = <0 0x500 0x100>;
>> +
>> +					cm_abe_clkctrl: cm_abe_clkctrl@20 {
>> +						compatible = "ti,omap4-clkctrl";
>> +						reg = <0x20 0x6c>;
>> +						#clock-cells = <2>;
>> +					};
>> +				};
>> +
>>  				cm1_clockdomains: clockdomains {
>>  				};
>>  			};
>>
>>  			cm2: cm2@8000 {
>> -				compatible = "ti,omap4-cm2";
>> +				compatible = "ti,omap4-cm2", "simple-bus";
>>  				reg = <0x8000 0x3000>;
>> +				#address-cells = <1>;
>> +				#size-cells = <1>;
>> +				ranges = <0 0x8000 0x3000>;
>>
>>  				cm2_clocks: clocks {
>>  					#address-cells = <1>;
>>  					#size-cells = <0>;
>>  				};
>>
>> +				cm_l4per: cm_l4per@0 {
>
> and 1400 here.

Yeah, these two are obviously wrong as noted before. Will be fixed in 
the full patch I will provide hopefully next week.

-Tero

>
>> +					compatible = "ti,omap4-cm";
>> +					reg = <0x1400 0x200>;
>> +					#address-cells = <1>;
>> +					#size-cells = <1>;
>> +					ranges = <0 0x1400 0x200>;
>> +
>> +					cm_l4per_clkctrl: cm_l4per_clkctrl@20 {
>
diff mbox

Patch

diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 8087456..214e58d 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -9,6 +9,7 @@ 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/pinctrl/omap.h>
+#include <dt-bindings/clock/omap4.h>
 
 / {
 	compatible = "ti,omap4430", "ti,omap4";
@@ -131,27 +132,61 @@ 
 			ranges = <0 0x4a000000 0x1000000>;
 
 			cm1: cm1@4000 {
-				compatible = "ti,omap4-cm1";
+				compatible = "ti,omap4-cm1", "simple-bus";
 				reg = <0x4000 0x2000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+				ranges = <0 0x4000 0x2000>;
 
 				cm1_clocks: clocks {
 					#address-cells = <1>;
 					#size-cells = <0>;
 				};
 
+				cm_abe: cm_abe@0 {
+					compatible = "ti,omap4-cm";
+					reg = <0x500 0x100>;
+					#address-cells = <1>;
+					#size-cells = <1>;
+					ranges = <0 0x500 0x100>;
+
+					cm_abe_clkctrl: cm_abe_clkctrl@20 {
+						compatible = "ti,omap4-clkctrl";
+						reg = <0x20 0x6c>;
+						#clock-cells = <2>;
+					};
+				};
+
 				cm1_clockdomains: clockdomains {
 				};
 			};
 
 			cm2: cm2@8000 {
-				compatible = "ti,omap4-cm2";
+				compatible = "ti,omap4-cm2", "simple-bus";
 				reg = <0x8000 0x3000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+				ranges = <0 0x8000 0x3000>;
 
 				cm2_clocks: clocks {
 					#address-cells = <1>;
 					#size-cells = <0>;
 				};
 
+				cm_l4per: cm_l4per@0 {
+					compatible = "ti,omap4-cm";
+					reg = <0x1400 0x200>;
+					#address-cells = <1>;
+					#size-cells = <1>;
+					ranges = <0 0x1400 0x200>;
+
+					cm_l4per_clkctrl: cm_l4per_clkctrl@20 {
+						compatible = "ti,omap4-clkctrl";
+						reg = <0x20 0x1b0>;
+						#clock-cells = <2>;
+					};
+				};
+
 				cm2_clockdomains: clockdomains {
 				};
 			};
@@ -304,6 +339,8 @@ 
 			#gpio-cells = <2>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
+			clocks = <&cm_l4per_clkctrl OMAP4_GPIO2_CLKCTRL 0>;
+			clock-names = "clkctrl";
 		};
 
 		gpio3: gpio@48057000 {
@@ -315,6 +352,8 @@ 
 			#gpio-cells = <2>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
+			clocks = <&cm_l4per_clkctrl OMAP4_GPIO3_CLKCTRL 0>;
+			clock-names = "clkctrl";
 		};
 
 		gpio4: gpio@48059000 {
@@ -384,6 +423,8 @@ 
 			interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
 			ti,hwmods = "uart1";
 			clock-frequency = <48000000>;
+			clocks = <&cm_l4per_clkctrl OMAP4_UART1_CLKCTRL 0>;
+			clock-names = "clkctrl";
 		};
 
 		uart2: serial@4806c000 {
@@ -392,6 +433,8 @@ 
 			interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 			ti,hwmods = "uart2";
 			clock-frequency = <48000000>;
+			clocks = <&cm_l4per_clkctrl OMAP4_UART2_CLKCTRL 0>;
+			clock-names = "clkctrl";
 		};
 
 		uart3: serial@48020000 {
@@ -400,6 +443,8 @@ 
 			interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
 			ti,hwmods = "uart3";
 			clock-frequency = <48000000>;
+			clocks = <&cm_l4per_clkctrl OMAP4_UART3_CLKCTRL 0>;
+			clock-names = "clkctrl";
 		};
 
 		uart4: serial@4806e000 {
@@ -408,6 +453,8 @@ 
 			interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
 			ti,hwmods = "uart4";
 			clock-frequency = <48000000>;
+			clocks = <&cm_l4per_clkctrl OMAP4_UART4_CLKCTRL 0>;
+			clock-names = "clkctrl";
 		};
 
 		hwspinlock: spinlock@4a0f6000 {
@@ -424,6 +471,8 @@ 
 			#address-cells = <1>;
 			#size-cells = <0>;
 			ti,hwmods = "i2c1";
+			clocks = <&cm_l4per_clkctrl OMAP4_I2C1_CLKCTRL 0>;
+			clock-names = "clkctrl";
 		};
 
 		i2c2: i2c@48072000 {
@@ -433,6 +482,8 @@ 
 			#address-cells = <1>;
 			#size-cells = <0>;
 			ti,hwmods = "i2c2";
+			clocks = <&cm_l4per_clkctrl OMAP4_I2C2_CLKCTRL 0>;
+			clock-names = "clkctrl";
 		};
 
 		i2c3: i2c@48060000 {
@@ -442,6 +493,8 @@ 
 			#address-cells = <1>;
 			#size-cells = <0>;
 			ti,hwmods = "i2c3";
+			clocks = <&cm_l4per_clkctrl OMAP4_I2C3_CLKCTRL 0>;
+			clock-names = "clkctrl";
 		};
 
 		i2c4: i2c@48350000 {
@@ -451,6 +504,8 @@ 
 			#address-cells = <1>;
 			#size-cells = <0>;
 			ti,hwmods = "i2c4";
+			clocks = <&cm_l4per_clkctrl OMAP4_I2C4_CLKCTRL 0>;
+			clock-names = "clkctrl";
 		};
 
 		mcspi1: spi@48098000 {
@@ -522,6 +577,7 @@ 
 			dmas = <&sdma 61>, <&sdma 62>;
 			dma-names = "tx", "rx";
 			pbias-supply = <&pbias_mmc_reg>;
+
 		};
 
 		mmc2: mmc@480b4000 {
@@ -542,6 +598,8 @@ 
 			ti,needs-special-reset;
 			dmas = <&sdma 77>, <&sdma 78>;
 			dma-names = "tx", "rx";
+			clocks = <&cm_l4per_clkctrl OMAP4_MMC3_CLKCTRL 0>;
+			clock-names = "clkctrl";
 		};
 
 		mmc4: mmc@480d1000 {
@@ -552,6 +610,8 @@ 
 			ti,needs-special-reset;
 			dmas = <&sdma 57>, <&sdma 58>;
 			dma-names = "tx", "rx";
+			clocks = <&cm_l4per_clkctrl OMAP4_MMC4_CLKCTRL 0>;
+			clock-names = "clkctrl";
 		};
 
 		mmc5: mmc@480d5000 {
@@ -562,6 +622,8 @@ 
 			ti,needs-special-reset;
 			dmas = <&sdma 59>, <&sdma 60>;
 			dma-names = "tx", "rx";
+			clocks = <&cm_l4per_clkctrl OMAP4_MMC5_CLKCTRL 0>;
+			clock-names = "clkctrl";
 		};
 
 		mmu_dsp: mmu@4a066000 {
@@ -598,6 +660,8 @@ 
 			dmas = <&sdma 65>,
 			       <&sdma 66>;
 			dma-names = "up_link", "dn_link";
+			clocks = <&cm_abe_clkctrl OMAP4_MCPDM_CLKCTRL 0>;
+			clock-names = "clkctrl";
 			status = "disabled";
 		};
 
@@ -610,6 +674,8 @@ 
 			ti,hwmods = "dmic";
 			dmas = <&sdma 67>;
 			dma-names = "up_link";
+			clocks = <&cm_abe_clkctrl OMAP4_DMIC_CLKCTRL 0>;
+			clock-names = "clkctrl";
 			status = "disabled";
 		};
 
@@ -625,6 +691,8 @@ 
 			dmas = <&sdma 33>,
 			       <&sdma 34>;
 			dma-names = "tx", "rx";
+			clocks = <&cm_abe_clkctrl OMAP4_MCBSP1_CLKCTRL 0>;
+			clock-names = "clkctrl";
 			status = "disabled";
 		};