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d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=WnPxcF6tcnJB0ZBx6NBn1pSNAHqmUnA/iJKc2EiUIVA=; b=OoIlwpCuiq/TKu2J4E29yVWRPh8hfWKkFYDxU9JeUaGQof7U6xFLdVJY5D0CFxn5+m jux8wk2CmXftv5UkgleiFYixUddmk7LEvvP/lVEMf1MjBlAQLljzxvKX4aAFbymI9CJs VUG6wnDXsSc8v2x7clJf2bXsddFlo9C8jTDOvfrZGJHwWEfFvg7KPpw2s7n3SGqE5oC1 +qGmwZhCtGx+6oLhITpfEpYhTSBHKpXV7MDEZHiu44+Id6DUZERUuEDHqz8Gw0mO0Wuc e3ipu7EspuiJ5V0IDkI1TLj8/zfAzjaoDQt9kdfxh8ZpmHj9GTHi3/BuTYzZYoPcKcSN meaw== X-Gm-Message-State: AMke39mODC7I3DvviE7cXCk0ZDcAcTmktMawfXfIiMANHHB5c6Jkll/Jnuvvz510XKAJgIIb X-Received: by 10.28.214.144 with SMTP id n138mr2606810wmg.136.1488365173179; Wed, 01 Mar 2017 02:46:13 -0800 (PST) Received: from localhost.localdomain ([90.63.244.31]) by smtp.gmail.com with ESMTPSA id m201sm6399691wmd.19.2017.03.01.02.46.12 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 01 Mar 2017 02:46:12 -0800 (PST) From: Neil Armstrong To: sboyd@codeaurora.org, khilman@baylibre.com, carlo@caione.org Subject: [PATCH v2 3/3] ARM64: dts: meson-gx: Add MALI nodes for GXBB and GXL Date: Wed, 1 Mar 2017 11:46:04 +0100 Message-Id: <1488365164-22861-4-git-send-email-narmstrong@baylibre.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1488365164-22861-1-git-send-email-narmstrong@baylibre.com> References: <1488365164-22861-1-git-send-email-narmstrong@baylibre.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170301_024635_318187_AD833142 X-CRM114-Status: GOOD ( 16.57 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Neil Armstrong , linux-kernel@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The same MALI-450 MP3 GPU is present in the GXBB and GXL SoCs. The node is simply added in the meson-gxbb.dtsi file. For GXL, since a lot is shared with the GXM that has a MALI-T820 IP, this patch adds a new meson-gxl-mali.dtsi and is included in the SoC specific dtsi files. Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 37 ++++++++++++++++++++ arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi | 43 ++++++++++++++++++++++++ arch/arm64/boot/dts/amlogic/meson-gxl-s905d.dtsi | 1 + arch/arm64/boot/dts/amlogic/meson-gxl-s905x.dtsi | 1 + 4 files changed, 82 insertions(+) create mode 100644 arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi index b353073..4f7ae6a 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi @@ -474,6 +474,43 @@ }; }; +&apb { + mali: gpu@c0000 { + compatible = "amlogic,meson-gxbb-mali", "arm,mali-450"; + reg = <0x0 0xc0000 0x0 0x40000>; + interrupts = , + , + , + , + , + , + , + , + , + ; + interrupt-names = "gp", "gpmmu", "pp", "pmu", + "pp0", "ppmmu0", "pp1", "ppmmu1", + "pp2", "ppmmu2"; + clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>; + clock-names = "bus", "core"; + + /* + * Mali clocking is provided by two identical clock paths + * MALI_0 and MALI_1 muxed to a single clock by a glitch + * free mux to safely change frequency while running. + */ + assigned-clocks = <&clkc CLKID_MALI_0_SEL>, + <&clkc CLKID_MALI_0>, + <&clkc CLKID_MALI>; /* Glitch free mux */ + assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>, + <0>, /* Do Nothing */ + <&clkc CLKID_MALI_0>; + assigned-clock-rates = <0>, /* Do Nothing */ + <666666666>, + <0>; /* Do Nothing */ + }; +}; + &i2c_A { clocks = <&clkc CLKID_I2C>; }; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi new file mode 100644 index 0000000..f06cc234 --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi @@ -0,0 +1,43 @@ +/* + * Copyright (c) 2017 BayLibre SAS + * Author: Neil Armstrong + * + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) + */ + +&apb { + mali: gpu@c0000 { + compatible = "amlogic,meson-gxbb-mali", "arm,mali-450"; + reg = <0x0 0xc0000 0x0 0x40000>; + interrupts = , + , + , + , + , + , + , + , + , + ; + interrupt-names = "gp", "gpmmu", "pp", "pmu", + "pp0", "ppmmu0", "pp1", "ppmmu1", + "pp2", "ppmmu2"; + clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>; + clock-names = "bus", "core"; + + /* + * Mali clocking is provided by two identical clock paths + * MALI_0 and MALI_1 muxed to a single clock by a glitch + * free mux to safely change frequency while running. + */ + assigned-clocks = <&clkc CLKID_MALI_0_SEL>, + <&clkc CLKID_MALI_0>, + <&clkc CLKID_MALI>; /* Glitch free mux */ + assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>, + <0>, /* Do Nothing */ + <&clkc CLKID_MALI_0>; + assigned-clock-rates = <0>, /* Do Nothing */ + <666666666>, + <0>; /* Do Nothing */ + }; +}; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d.dtsi index 615308e..5a90e30 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d.dtsi @@ -42,6 +42,7 @@ */ #include "meson-gxl.dtsi" +#include "meson-gxl-mali.dtsi" / { compatible = "amlogic,s905d", "amlogic,meson-gxl"; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x.dtsi index 08237ee..0f78d83 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x.dtsi @@ -42,6 +42,7 @@ */ #include "meson-gxl.dtsi" +#include "meson-gxl-mali.dtsi" / { compatible = "amlogic,s905x", "amlogic,meson-gxl";