From patchwork Fri Apr 7 08:06:58 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pengcheng Li X-Patchwork-Id: 9669003 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id BA25360364 for ; Fri, 7 Apr 2017 08:21:44 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A2C7722701 for ; Fri, 7 Apr 2017 08:21:44 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 97370285C0; Fri, 7 Apr 2017 08:21:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 6243222701 for ; Fri, 7 Apr 2017 08:21:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:To :From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=dVhXp/Utzt4Tan/qsAwpMmu2XT09qm7Xav/rvm3A06Y=; b=bvqwzR5SfBl4ww AdR5ojmid75Iy8Hvpmo81crOyCjQeTgquRdGn+2SLTwGWQmf/zkFiUhHwM3Fgo/L3dW794EUPH7og LUL8XjRRQ0XguityCIvP3XU3lUPi8mU6qql/FbGVpwKBwAKpCcBqRLYUVjWwNBZdn8nPfbs+9NhqO AGfgsLflKIRyITkbWK472zaTxATTXNeRL/z6IG5m/8EqfipfUKTQPgI203MePzqTjK+91CcKQ8H5g DCIxTEwiXZ2Q8rJlyvFijHFzGFHQ8xbWinPcFUHy+Wbnv3zx8KaNijaQVlC+Dse2NudAhwArXiJPG 6D+7w7l6j7jw0bYDt4tg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1cwP9H-0000GG-Sf; Fri, 07 Apr 2017 08:21:39 +0000 Received: from szxga03-in.huawei.com ([119.145.14.66]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1cwOy9-0002Ys-Hy for linux-arm-kernel@lists.infradead.org; Fri, 07 Apr 2017 08:10:13 +0000 Received: from 172.24.1.136 (EHLO szxeml422-hub.china.huawei.com) ([172.24.1.136]) by szxrg03-dlp.huawei.com (MOS 4.4.3-GA FastPath queued) with ESMTP id CRH05064; Fri, 07 Apr 2017 16:09:15 +0800 (CST) Received: from HSH1000039104.huawei.com (10.177.181.43) by szxeml422-hub.china.huawei.com (10.82.67.152) with Microsoft SMTP Server id 14.3.235.1; Fri, 7 Apr 2017 16:09:05 +0800 From: Li Pengcheng To: , , , , Subject: [PATCH] arm64: dts: Add coresight DT nodes for hi6220-hikey Date: Fri, 7 Apr 2017 16:06:58 +0800 Message-ID: <1491552418-74386-1-git-send-email-lipengcheng8@huawei.com> X-Mailer: git-send-email 2.1.0 MIME-Version: 1.0 X-Originating-IP: [10.177.181.43] X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170407_011010_173087_9B591B08 X-CRM114-Status: GOOD ( 12.94 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dan.zhao@hisilicon.com, devicetree@vger.kernel.org, lizhong11@hisilicon.com, suzhuangluan@hisilicon.com, linux-kernel@vger.kernel.org, lipengcheng8@huawei.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add coresight DT nodes for hikey board. Signed-off-by: Li Pengcheng Signed-off-by: Li Zhong --- .../arm64/boot/dts/hisilicon/hi6220-coresight.dtsi | 318 +++++++++++++++++++++ arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 1 + 2 files changed, 319 insertions(+) create mode 100644 arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi new file mode 100644 index 0000000..a523e43 --- /dev/null +++ b/arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi @@ -0,0 +1,318 @@ +/* + * Hisilicon Ltd. Hi6220 SoC + * + * Copyright (C) 2015-2016 Hisilicon Ltd. + * Author: lipengcheng + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * publishhed by the Free Software Foundation. + */ +/ { + amba { + /* A53 cluster0 internal coresight */ + #address-cells = <2>; + #size-cells = <2>; + compatible = "arm,amba-bus"; + ranges; + etm@0,f659c000 { + compatible = "arm,coresight-etm4x","arm,primecell"; + reg = <0 0xf659c000 0 0x1000>; + + clocks = <&sys_ctrl HI6220_CS_ATB>; + clock-names = "apb_pclk"; + cpu = <&cpu0>; + port { + etm0_out_port: endpoint { + remote-endpoint = <&funnel0_in_port0>; + }; + }; + }; + + etm@1,f659d000 { + compatible = "arm,coresight-etm4x","arm,primecell"; + reg = <0 0xf659d000 0 0x1000>; + + clocks = <&sys_ctrl HI6220_CS_ATB>; + clock-names = "apb_pclk"; + cpu = <&cpu1>; + port { + etm1_out_port: endpoint { + remote-endpoint = <&funnel0_in_port1>; + }; + }; + + }; + + etm@2,f659e000 { + compatible = "arm,coresight-etm4x","arm,primecell"; + reg = <0 0xf659e000 0 0x1000>; + + clocks = <&sys_ctrl HI6220_CS_ATB>; + clock-names = "apb_pclk"; + cpu = <&cpu2>; + port { + etm2_out_port: endpoint { + remote-endpoint = <&funnel0_in_port2>; + }; + }; + }; + + etm@3,f659f000 { + compatible = "arm,coresight-etm4x","arm,primecell"; + reg = <0 0xf659f000 0 0x1000>; + + clocks = <&sys_ctrl HI6220_CS_ATB>; + clock-names = "apb_pclk"; + cpu = <&cpu3>; + port { + etm3_out_port: endpoint { + remote-endpoint = <&funnel0_in_port3>; + }; + }; + }; + + /* A53 cluster1 internal coresight */ + etm@4,f65dc000 { + compatible = "arm,coresight-etm4x","arm,primecell"; + reg = <0 0xf65dc000 0 0x1000>; + + clocks = <&sys_ctrl HI6220_CS_ATB>; + clock-names = "apb_pclk"; + cpu = <&cpu4>; + port { + etm4_out_port: endpoint { + remote-endpoint = <&funnel0_in_port4>; + }; + }; + }; + + etm@5,f65dd000 { + compatible = "arm,coresight-etm4x","arm,primecell"; + reg = <0 0xf65dd000 0 0x1000>; + + clocks = <&sys_ctrl HI6220_CS_ATB>; + clock-names = "apb_pclk"; + cpu = <&cpu5>; + port { + etm5_out_port: endpoint { + remote-endpoint = <&funnel0_in_port5>; + }; + }; + }; + + etm@6,f65de000 { + compatible = "arm,coresight-etm4x","arm,primecell"; + reg = <0 0xf65de000 0 0x1000>; + + clocks = <&sys_ctrl HI6220_CS_ATB>; + clock-names = "apb_pclk"; + cpu = <&cpu6>; + port { + etm6_out_port: endpoint { + remote-endpoint = <&funnel0_in_port6>; + }; + }; + }; + + etm@7,f65df000 { + compatible = "arm,coresight-etm4x","arm,primecell"; + reg = <0 0xf65df000 0 0x1000>; + + clocks = <&sys_ctrl HI6220_CS_ATB>; + clock-names = "apb_pclk"; + cpu = <&cpu7>; + port { + etm7_out_port: endpoint { + remote-endpoint = <&funnel0_in_port7>; + }; + }; + }; + + funnel0:funnel@0,f6501000 { + compatible = "arm,coresight-funnel","arm,primecell"; + reg = <0 0xf6501000 0 0x1000>; + + clocks = <&sys_ctrl HI6220_CS_ATB>; + clock-names = "apb_pclk"; + ports { + #address-cells = <1>; + #size-cells = <0>; + + /* funnel output port */ + port@0 { + reg = <0>; + funnel0_out_port: endpoint { + remote-endpoint = <&funnel1_in_port>; + }; + }; + + /* funnel input ports */ + port@1 { + reg = <0>; + funnel0_in_port0: endpoint { + slave-mode; + remote-endpoint = <&etm0_out_port>; + }; + }; + + port@2 { + reg = <1>; + funnel0_in_port1: endpoint { + slave-mode; + remote-endpoint = <&etm1_out_port>; + }; + }; + + port@3 { + reg = <2>; + funnel0_in_port2: endpoint { + slave-mode; + remote-endpoint = <&etm2_out_port>; + }; + }; + + port@4 { + reg = <3>; + funnel0_in_port3: endpoint { + slave-mode; + remote-endpoint = <&etm3_out_port>; + }; + }; + + port@5 { + reg = <4>; + funnel0_in_port4: endpoint { + slave-mode; + remote-endpoint = <&etm4_out_port>; + }; + }; + + port@6 { + reg = <5>; + funnel0_in_port5: endpoint { + slave-mode; + remote-endpoint = <&etm5_out_port>; + }; + }; + + port@7 { + reg = <6>; + funnel0_in_port6: endpoint { + slave-mode; + remote-endpoint = <&etm6_out_port>; + }; + }; + + port@8 { + reg = <7>; + funnel0_in_port7: endpoint { + slave-mode; + remote-endpoint = <&etm7_out_port>; + }; + }; + }; + }; + + funnel1:funnel@1,f6401000 { + compatible = "arm,coresight-funnel","arm,primecell"; + reg = <0 0xf6401000 0 0x1000>; + + clocks = <&sys_ctrl HI6220_CS_ATB>; + clock-names = "apb_pclk"; + ports { + #address-cells = <1>; + #size-cells = <0>; + /* funnel1 output port */ + port@0 { + reg = <0>; + funnel1_out_port: endpoint { + remote-endpoint = <&etf_in_port>; + }; + }; + + /* funnel1 input port */ + port@1 { + reg = <0>; + funnel1_in_port: endpoint { + slave-mode; + remote-endpoint = <&funnel0_out_port>; + }; + }; + }; + }; + etf:etf@0,f6402000 { + compatible = "arm,coresight-tmc","arm,primecell"; + reg = <0 0xf6402000 0 0x1000>; + + clocks = <&sys_ctrl HI6220_CS_ATB>; + clock-names = "apb_pclk"; + ports { + #address-cells = <1>; + #size-cells = <0>; + /* etf input port */ + port@0 { + reg = <0>; + etf_in_port: endpoint { + slave-mode; + remote-endpoint = <&funnel1_out_port>; + }; + }; + /* etf output port */ + port@1 { + reg = <0>; + etf_out_port: endpoint { + remote-endpoint = <&replicator0_in_port>; + }; + }; + }; + }; + + replicator@0{ + compatible = "arm,coresight-replicator"; + + clocks = <&sys_ctrl HI6220_CS_ATB>; + clock-names = "apb_pclk"; + ports { + #address-cells = <1>; + #size-cells = <0>; + /* replicator input port */ + port@0 { + reg = <0>; + replicator0_in_port: endpoint{ + slave-mode; + remote-endpoint = <&etf_out_port>; + }; + }; + /* replicator out port */ + port@1 { + reg = <0>; + replicator0_out_port: endpoint { + remote-endpoint = <&etr0_in_port>; + }; + }; + }; + }; + + etr@0,f6404000 { + compatible = "arm,coresight-tmc","arm,primecell"; + reg = <0 0xf6404000 0 0x1000>; + + coresight-default-sink; + clocks = <&sys_ctrl HI6220_CS_ATB>; + clock-names = "apb_pclk"; + ports { + #address-cells = <1>; + #size-cells = <0>; + /* etr input port */ + port@0 { + etr0_in_port: endpoint{ + slave-mode; + remote-endpoint = <&replicator0_out_port>; + }; + }; + }; + }; + }; +}; + diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts index dba3c13..fb70c9b 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts +++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts @@ -8,6 +8,7 @@ /dts-v1/; #include "hi6220.dtsi" #include "hikey-pinctrl.dtsi" +#include "hi6220-coresight.dtsi" #include / {