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[88.121.166.205]) by smtp.gmail.com with ESMTPSA id l68sm23837805wrc.52.2017.04.24.13.41.40 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 24 Apr 2017 13:41:41 -0700 (PDT) From: Daniel Lezcano To: xuwei5@hisilicon.com Subject: [PATCH V4] ARM64: dts: hi6220-hikey: Add clock binding for the pmic mfd Date: Mon, 24 Apr 2017 22:40:22 +0200 Message-Id: <1493066439-6889-1-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 1.9.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170424_134204_438758_CF5D370E X-CRM114-Status: GOOD ( 14.30 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Rob Herring , Arnd Bergmann , "open list:OPEN FIRMWARE AND..." , Catalin Marinas , Michael Turquette , Stephen Boyd , open list , Will Deacon , Rob Herring , Lee Jones , "moderated list:ARM/HISILICON SOC..." MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The hi655x PMIC provides the regulators but also a clock. The latter is missing in the definition and in the DT, thus it is no possible to enable the WiFi which depends on this clock. The hi655x's clock has been added and the hi655x multifunction driver has updated with a clock-cell. This patch adds the clock-cells for the PMIC in the DT and updates the documentation. Signed-off-by: Daniel Lezcano Acked-by: Rob Herring Acked-by: Lee Jones Cc: Arnd Bergmann Cc: Stephen Boyd Cc: Michael Turquette --- Changelog: v4: - Added Acked-by's - Updated the commit message with a better description --- Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt | 6 ++++++ arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 1 + 2 files changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt b/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt index 0548569..9630ac0 100644 --- a/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt +++ b/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt @@ -16,6 +16,11 @@ Required properties: - reg: Base address of PMIC on Hi6220 SoC. - interrupt-controller: Hi655x has internal IRQs (has own IRQ domain). - pmic-gpios: The GPIO used by PMIC IRQ. +- #clock-cells: From common clock binding; shall be set to 0 + +Optional properties: +- clock-output-names: From common clock binding to override the + default output clock name Example: pmic: pmic@f8000000 { @@ -24,4 +29,5 @@ Example: interrupt-controller; #interrupt-cells = <2>; pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; + #clock-cells = <0>; } diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts index dba3c13..e0496f7 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts +++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts @@ -325,6 +325,7 @@ pmic: pmic@f8000000 { compatible = "hisilicon,hi655x-pmic"; reg = <0x0 0xf8000000 0x0 0x1000>; + #clock-cells = <0>; interrupt-controller; #interrupt-cells = <2>; pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;