| Message ID | 1494415918-13770-2-git-send-email-gakula@caviumnetworks.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Wednesday, May 10, 2017 05:01:55 PM Geetha sowjanya wrote: > From: Linu Cherian <linu.cherian@cavium.com> > > Add SMMUv3 model definition for ThunderX2. > > Signed-off-by: Linu Cherian <linu.cherian@cavium.com> > Signed-off-by: Geetha Sowjanya <geethasowjanya.akula@cavium.com> This is an ACPICA change, but you have not included the ACPICA maintainers into your original CC list (added now). Bob, Lv, how should this be routed? Do you want to apply this patch upstream first or can we make this change in Linux and upstream in parallel? That shouldn't be a big deal, right? > --- > include/acpi/actbl2.h | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/include/acpi/actbl2.h b/include/acpi/actbl2.h > index faa9f2c..76a6f5d 100644 > --- a/include/acpi/actbl2.h > +++ b/include/acpi/actbl2.h > @@ -779,6 +779,8 @@ struct acpi_iort_smmu { > #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */ > #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */ > > +#define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium ThunderX2 SMMUv3 */ > + > /* Masks for Flags field above */ > > #define ACPI_IORT_SMMU_DVM_SUPPORTED (1) > Thanks, Rafael
On Thu, May 11, 2017 at 02:26:02AM +0200, Rafael J. Wysocki wrote: > On Wednesday, May 10, 2017 05:01:55 PM Geetha sowjanya wrote: > > From: Linu Cherian <linu.cherian@cavium.com> > > > > Add SMMUv3 model definition for ThunderX2. > > > > Signed-off-by: Linu Cherian <linu.cherian@cavium.com> > > Signed-off-by: Geetha Sowjanya <geethasowjanya.akula@cavium.com> > > This is an ACPICA change, but you have not included the ACPICA maintainers > into your original CC list (added now). > > Bob, Lv, how should this be routed? > > Do you want to apply this patch upstream first or can we make this change in > Linux and upstream in parallel? That shouldn't be a big deal, right? I think we're still waiting for the updated IORT document to be published (I think this should be in the next week or so), so I don't think we should commit the new ID before that happens. Will > > --- > > include/acpi/actbl2.h | 2 ++ > > 1 file changed, 2 insertions(+) > > > > diff --git a/include/acpi/actbl2.h b/include/acpi/actbl2.h > > index faa9f2c..76a6f5d 100644 > > --- a/include/acpi/actbl2.h > > +++ b/include/acpi/actbl2.h > > @@ -779,6 +779,8 @@ struct acpi_iort_smmu { > > #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */ > > #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */ > > > > +#define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium ThunderX2 SMMUv3 */ > > + > > /* Masks for Flags field above */ > > > > #define ACPI_IORT_SMMU_DVM_SUPPORTED (1) > > > > Thanks, > Rafael >
On Thursday, May 11, 2017 09:45:25 AM Will Deacon wrote: > On Thu, May 11, 2017 at 02:26:02AM +0200, Rafael J. Wysocki wrote: > > On Wednesday, May 10, 2017 05:01:55 PM Geetha sowjanya wrote: > > > From: Linu Cherian <linu.cherian@cavium.com> > > > > > > Add SMMUv3 model definition for ThunderX2. > > > > > > Signed-off-by: Linu Cherian <linu.cherian@cavium.com> > > > Signed-off-by: Geetha Sowjanya <geethasowjanya.akula@cavium.com> > > > > This is an ACPICA change, but you have not included the ACPICA maintainers > > into your original CC list (added now). > > > > Bob, Lv, how should this be routed? > > > > Do you want to apply this patch upstream first or can we make this change in > > Linux and upstream in parallel? That shouldn't be a big deal, right? > > I think we're still waiting for the updated IORT document to be published (I > think this should be in the next week or so), so I don't think we should > commit the new ID before that happens. OK, thanks for the heads-up. I think it's better to submit the actbl2.h update directly to ACPICA upstream when the doc is published and then work on top of that. Thanks, Rafael
On Thu, May 11, 2017 at 04:40:51PM +0200, Rafael J. Wysocki wrote: > On Thursday, May 11, 2017 09:45:25 AM Will Deacon wrote: > > On Thu, May 11, 2017 at 02:26:02AM +0200, Rafael J. Wysocki wrote: > > > On Wednesday, May 10, 2017 05:01:55 PM Geetha sowjanya wrote: > > > > From: Linu Cherian <linu.cherian@cavium.com> > > > > > > > > Add SMMUv3 model definition for ThunderX2. > > > > > > > > Signed-off-by: Linu Cherian <linu.cherian@cavium.com> > > > > Signed-off-by: Geetha Sowjanya <geethasowjanya.akula@cavium.com> > > > > > > This is an ACPICA change, but you have not included the ACPICA maintainers > > > into your original CC list (added now). > > > > > > Bob, Lv, how should this be routed? > > > > > > Do you want to apply this patch upstream first or can we make this change in > > > Linux and upstream in parallel? That shouldn't be a big deal, right? > > > > I think we're still waiting for the updated IORT document to be published (I > > think this should be in the next week or so), so I don't think we should > > commit the new ID before that happens. > > OK, thanks for the heads-up. > > I think it's better to submit the actbl2.h update directly to ACPICA > upstream when the doc is published and then work on top of that. The doc is now published: http://infocenter.arm.com/help/topic/com.arm.doc.den0049c/DEN0049C_IO_Remapping_Table.pdf so the new model numbers are confirmed. Cheers, Will
On Fri, May 12, 2017 at 3:54 PM, Will Deacon <will.deacon@arm.com> wrote: > On Thu, May 11, 2017 at 04:40:51PM +0200, Rafael J. Wysocki wrote: >> On Thursday, May 11, 2017 09:45:25 AM Will Deacon wrote: >> > On Thu, May 11, 2017 at 02:26:02AM +0200, Rafael J. Wysocki wrote: >> > > On Wednesday, May 10, 2017 05:01:55 PM Geetha sowjanya wrote: >> > > > From: Linu Cherian <linu.cherian@cavium.com> >> > > > >> > > > Add SMMUv3 model definition for ThunderX2. >> > > > >> > > > Signed-off-by: Linu Cherian <linu.cherian@cavium.com> >> > > > Signed-off-by: Geetha Sowjanya <geethasowjanya.akula@cavium.com> >> > > >> > > This is an ACPICA change, but you have not included the ACPICA maintainers >> > > into your original CC list (added now). >> > > >> > > Bob, Lv, how should this be routed? >> > > >> > > Do you want to apply this patch upstream first or can we make this change in >> > > Linux and upstream in parallel? That shouldn't be a big deal, right? >> > >> > I think we're still waiting for the updated IORT document to be published (I >> > think this should be in the next week or so), so I don't think we should >> > commit the new ID before that happens. >> >> OK, thanks for the heads-up. >> >> I think it's better to submit the actbl2.h update directly to ACPICA >> upstream when the doc is published and then work on top of that. > > The doc is now published: > > http://infocenter.arm.com/help/topic/com.arm.doc.den0049c/DEN0049C_IO_Remapping_Table.pdf > > so the new model numbers are confirmed. > > Cheers, > > Will Thanks Will. Will resubmit the patches based on Robin's latest patch "acpica: iort: Update SMMU models for IORT rev. C", as there is a miss match in the macro name used to define ThunderX2 iort model number. https://lkml.org/lkml/2017/5/12/211 Thank you, Geetha.
diff --git a/include/acpi/actbl2.h b/include/acpi/actbl2.h index faa9f2c..76a6f5d 100644 --- a/include/acpi/actbl2.h +++ b/include/acpi/actbl2.h @@ -779,6 +779,8 @@ struct acpi_iort_smmu { #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */ #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */ +#define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium ThunderX2 SMMUv3 */ + /* Masks for Flags field above */ #define ACPI_IORT_SMMU_DVM_SUPPORTED (1)