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Mon, 15 May 2017 05:03:44 -0700 (PDT) Received: from anup-HP-Compaq-8100-Elite-CMT-PC.dhcp.avagotech.net ([192.19.237.250]) by smtp.gmail.com with ESMTPSA id m12sm4776572pgn.30.2017.05.15.05.03.40 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 15 May 2017 05:03:44 -0700 (PDT) From: Anup Patel To: Rob Herring , Mark Rutland , Michael Turquette Subject: [PATCH v2 10/11] arm64: dts: Add PL022, PL330 and SP805 DT nodes for Stingray Date: Mon, 15 May 2017 17:32:20 +0530 Message-Id: <1494849741-21294-11-git-send-email-anup.patel@broadcom.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1494849741-21294-1-git-send-email-anup.patel@broadcom.com> References: <1494849741-21294-1-git-send-email-anup.patel@broadcom.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170515_080407_349798_AA01DD52 X-CRM114-Status: GOOD ( 10.32 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Florian Fainelli , Sandeep Tripathy , Anup Patel , Scott Branden , Jon Mason , Catalin Marinas , Will Deacon , linux-kernel@vger.kernel.org, bcm-kernel-feedback-list@broadcom.com, Pramod Kumar , Oza Pawandeep , Ray Jui , Srinath Mannam , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP We have two instance of PL022 SPI controllers, one instance of DMA PL330, and one non-secure SP805 Watchdog on Stingray SOC. This patch adds DT nodes for the above mentioned devices in Stingray DT. Signed-off-by: Anup Patel Reviewed-by: Pramod KUMAR Reviewed-by: Ray Jui Reviewed-by: Scott Branden --- .../boot/dts/broadcom/stingray/bcm958742k.dts | 30 +++++++++++++ .../arm64/boot/dts/broadcom/stingray/stingray.dtsi | 52 ++++++++++++++++++++++ 2 files changed, 82 insertions(+) diff --git a/arch/arm64/boot/dts/broadcom/stingray/bcm958742k.dts b/arch/arm64/boot/dts/broadcom/stingray/bcm958742k.dts index c309cda..5671669 100644 --- a/arch/arm64/boot/dts/broadcom/stingray/bcm958742k.dts +++ b/arch/arm64/boot/dts/broadcom/stingray/bcm958742k.dts @@ -46,3 +46,33 @@ &uart3 { status = "okay"; }; + +&ssp0 { + pinctrl-0 = <&spi0_pins>; + pinctrl-names = "default"; + cs-gpios = <&gpio_hsls 34 0>; + status = "okay"; + + spi-flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <20000000>; + #address-cells = <1>; + #size-cells = <1>; + }; +}; + +&ssp1 { + pinctrl-0 = <&spi1_pins>; + pinctrl-names = "default"; + cs-gpios = <&gpio_hsls 96 0>; + status = "okay"; + + spi-flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <20000000>; + #address-cells = <1>; + #size-cells = <1>; + }; +}; diff --git a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi index 476a6fa..6d9c9f8 100644 --- a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi +++ b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi @@ -284,6 +284,14 @@ status = "disabled"; }; + wdt0: watchdog@689c0000 { + compatible = "arm,sp805", "arm,primecell"; + reg = <0x000c0000 0x1000>; + interrupts = ; + clocks = <&hsls_25m_div2_clk>, <&hsls_div4_clk>; + clock-names = "wdogclk", "apb_pclk"; + }; + gpio_hsls: gpio@689d0000 { compatible = "brcm,iproc-gpio"; reg = <0x000d0000 0x864>; @@ -364,11 +372,55 @@ status = "disabled"; }; + ssp0: ssp@68a80000 { + compatible = "arm,pl022", "arm,primecell"; + reg = <0x00180000 0x1000>; + interrupts = ; + clocks = <&hsls_div2_clk>, <&hsls_div2_clk>; + clock-names = "spiclk", "apb_pclk"; + num-cs = <1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + ssp1: ssp@68a90000 { + compatible = "arm,pl022", "arm,primecell"; + reg = <0x00190000 0x1000>; + interrupts = ; + clocks = <&hsls_div2_clk>, <&hsls_div2_clk>; + clock-names = "spiclk", "apb_pclk"; + num-cs = <1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + hwrng: hwrng@68b20000 { compatible = "brcm,iproc-rng200"; reg = <0x00220000 0x28>; }; + dma0: dma@68c10000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x00310000 0x1000>; + interrupts = , + , + , + , + , + , + , + , + ; + #dma-cells = <1>; + #dma-channels = <8>; + #dma-requests = <32>; + clocks = <&hsls_div2_clk>; + clock-names = "apb_pclk"; + iommus = <&smmu 0x6000 0x0000>; + }; + nand: nand@68c60000 { compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1"; reg = <0x00360000 0x600>,