From patchwork Tue May 30 09:16:12 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Petazzoni X-Patchwork-Id: 9754189 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 44F2660390 for ; Tue, 30 May 2017 09:18:34 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 36B5B27569 for ; Tue, 30 May 2017 09:18:34 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2B57727F10; Tue, 30 May 2017 09:18:34 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 38F5227569 for ; Tue, 30 May 2017 09:18:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=X5CagLutfJpusu3h44T4vca8NUUyBog4+5XtgGsV1f0=; b=Mqz6afR/ep9jNTGeEjYbfQEpvv 3L9lZD6oxrJ8aU4GSPZFAWLl/mXm+lZ7JCohiKb9INd9cV6ou0TOaYu7TGUzypyKS4HcfzZD+YluA +VYexo9mM32D6yjlH4EMf1B6vlLW903W6Er0MmvAeFj67WZn9mY0F771D7xuABjLNkkd5fNMOw50w gFl2kmkXFVvXwMXQh+TI9rXU9WmZDPQFqf/LtuYZuNi3RIdoKwMrTcBIE9v4YKrwLvdQTTma33SBk 8nRksa7hEJ7Z1JKHIz+6Lf8GRoR2p0cgD0twEVQz3CNZB2+jEj/NDZv2b8woXWHlq5uFkSKuVTDd2 +RS/u/LQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1dFdIN-0003la-Gt; Tue, 30 May 2017 09:18:31 +0000 Received: from mail.free-electrons.com ([62.4.15.54]) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1dFdH7-00025C-7E for linux-arm-kernel@lists.infradead.org; Tue, 30 May 2017 09:17:19 +0000 Received: by mail.free-electrons.com (Postfix, from userid 110) id 59D1520EE3; Tue, 30 May 2017 11:16:30 +0200 (CEST) Received: from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id 2CF5920411; Tue, 30 May 2017 11:16:30 +0200 (CEST) From: Thomas Petazzoni To: Thomas Gleixner , Jason Cooper , Marc Zyngier , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Rob Herring , Ian Campbell , Pawel Moll , Mark Rutland , Kumar Gala , Andrew Lunn , Sebastian Hesselbarth , Gregory Clement Subject: [PATCH 6/6] arm64: dts: marvell: enable GICP and ICU Date: Tue, 30 May 2017 11:16:12 +0200 Message-Id: <1496135772-20694-8-git-send-email-thomas.petazzoni@free-electrons.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1496135772-20694-1-git-send-email-thomas.petazzoni@free-electrons.com> References: <1496135772-20694-1-git-send-email-thomas.petazzoni@free-electrons.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170530_021714_428573_BFAE3520 X-CRM114-Status: GOOD ( 13.09 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Petazzoni , Yehuda Yitschak , Antoine Tenart , Nadav Haklai , Hanna Hawa , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This commit modifies the Marvell EBU Armada 7K and 8K Device Tree files to describe the ICU and GICP units, and use ICU interrupts for all devices in the CP110 blocks. Signed-off-by: Thomas Petazzoni --- arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 5 ++ .../boot/dts/marvell/armada-cp110-master.dtsi | 60 +++++++++++++--------- .../arm64/boot/dts/marvell/armada-cp110-slave.dtsi | 54 ++++++++++--------- 3 files changed, 71 insertions(+), 48 deletions(-) diff --git a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi index fe41bf9..cb87831 100644 --- a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi @@ -146,6 +146,11 @@ marvell,spi-base = <128>, <136>, <144>, <152>; }; + gicp: gicp@3f0040 { + compatible = "marvell,gicp"; + reg = <0x3f0040 0x10>; + }; + pic: interrupt-controller@3f0100 { compatible = "marvell,armada-8k-pic"; reg = <0x3f0100 0x10>; diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi index ac8df52..fe899e8 100644 --- a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi @@ -44,19 +44,20 @@ * Device Tree file for Marvell Armada CP110 Master. */ +#include + / { cp110-master { #address-cells = <2>; #size-cells = <2>; compatible = "simple-bus"; - interrupt-parent = <&gic>; + interrupt-parent = <&cpm_icu>; ranges; config-space@f2000000 { #address-cells = <1>; #size-cells = <1>; compatible = "simple-bus"; - interrupt-parent = <&gic>; ranges = <0x0 0x0 0xf2000000 0x2000000>; cpm_ethernet: ethernet@0 { @@ -68,21 +69,21 @@ dma-coherent; cpm_eth0: eth0 { - interrupts = ; + interrupts = ; port-id = <0>; gop-port-id = <0>; status = "disabled"; }; cpm_eth1: eth1 { - interrupts = ; + interrupts = ; port-id = <1>; gop-port-id = <2>; status = "disabled"; }; cpm_eth2: eth2 { - interrupts = ; + interrupts = ; port-id = <2>; gop-port-id = <3>; status = "disabled"; @@ -96,6 +97,15 @@ reg = <0x12a200 0x10>; }; + cpm_icu: interrupt-controller@1e0000 { + compatible = "marvell,icu"; + reg = <0x1e0000 0x10>; + #interrupt-cells = <3>; + interrupt-controller; + interrupt-parent = <&gic>; + gicp = <&gicp>; + }; + cpm_syscon0: system-controller@440000 { compatible = "marvell,cp110-system-controller0", "syscon"; @@ -120,14 +130,14 @@ compatible = "marvell,armada-8k-rtc"; reg = <0x284000 0x20>, <0x284080 0x24>; reg-names = "rtc", "rtc-soc"; - interrupts = ; + interrupts = ; }; cpm_sata0: sata@540000 { compatible = "marvell,armada-8k-ahci", "generic-ahci"; reg = <0x540000 0x30000>; - interrupts = ; + interrupts = ; clocks = <&cpm_syscon0 1 15>; status = "disabled"; }; @@ -137,7 +147,7 @@ "generic-xhci"; reg = <0x500000 0x4000>; dma-coherent; - interrupts = ; + interrupts = ; clocks = <&cpm_syscon0 1 22>; status = "disabled"; }; @@ -147,7 +157,7 @@ "generic-xhci"; reg = <0x510000 0x4000>; dma-coherent; - interrupts = ; + interrupts = ; clocks = <&cpm_syscon0 1 23>; status = "disabled"; }; @@ -195,7 +205,7 @@ reg = <0x701000 0x20>; #address-cells = <1>; #size-cells = <0>; - interrupts = ; + interrupts = ; clocks = <&cpm_syscon0 1 21>; status = "disabled"; }; @@ -205,7 +215,7 @@ reg = <0x701100 0x20>; #address-cells = <1>; #size-cells = <0>; - interrupts = ; + interrupts = ; clocks = <&cpm_syscon0 1 21>; status = "disabled"; }; @@ -213,7 +223,7 @@ cpm_trng: trng@760000 { compatible = "marvell,armada-8k-rng", "inside-secure,safexcel-eip76"; reg = <0x760000 0x7d>; - interrupts = ; + interrupts = ; clocks = <&cpm_syscon0 1 25>; status = "okay"; }; @@ -221,7 +231,7 @@ cpm_sdhci0: sdhci@780000 { compatible = "marvell,armada-cp110-sdhci"; reg = <0x780000 0x300>; - interrupts = ; + interrupts = ; clock-names = "core"; clocks = <&cpm_syscon0 1 4>; dma-coherent; @@ -231,13 +241,13 @@ cpm_crypto: crypto@800000 { compatible = "inside-secure,safexcel-eip197"; reg = <0x800000 0x200000>; - interrupts = , - , - , - , - , - ; + , + , + , + , + ; interrupt-names = "mem", "ring0", "ring1", "ring2", "ring3", "eip"; clocks = <&cpm_syscon0 1 26>; @@ -264,8 +274,8 @@ /* non-prefetchable memory */ 0x82000000 0 0xf6000000 0 0xf6000000 0 0xf00000>; interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; - interrupts = ; + interrupt-map = <0 0 0 0 &cpm_icu 0 ICU_GRP_NSR 22 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; num-lanes = <1>; clocks = <&cpm_syscon0 1 13>; status = "disabled"; @@ -290,8 +300,8 @@ /* non-prefetchable memory */ 0x82000000 0 0xf7000000 0 0xf7000000 0 0xf00000>; interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; - interrupts = ; + interrupt-map = <0 0 0 0 &cpm_icu 0 ICU_GRP_NSR 24 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; num-lanes = <1>; clocks = <&cpm_syscon0 1 11>; @@ -317,8 +327,8 @@ /* non-prefetchable memory */ 0x82000000 0 0xf8000000 0 0xf8000000 0 0xf00000>; interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; - interrupts = ; + interrupt-map = <0 0 0 0 &cpm_icu 0 ICU_GRP_NSR 23 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; num-lanes = <1>; clocks = <&cpm_syscon0 1 12>; diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi index 7740a75..f9cf4f3 100644 --- a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi @@ -49,14 +49,13 @@ #address-cells = <2>; #size-cells = <2>; compatible = "simple-bus"; - interrupt-parent = <&gic>; + interrupt-parent = <&cps_icu>; ranges; config-space@f4000000 { #address-cells = <1>; #size-cells = <1>; compatible = "simple-bus"; - interrupt-parent = <&gic>; ranges = <0x0 0x0 0xf4000000 0x2000000>; cps_rtc: rtc@284000 { @@ -75,21 +74,21 @@ dma-coherent; cps_eth0: eth0 { - interrupts = ; + interrupts = ; port-id = <0>; gop-port-id = <0>; status = "disabled"; }; cps_eth1: eth1 { - interrupts = ; + interrupts = ; port-id = <1>; gop-port-id = <2>; status = "disabled"; }; cps_eth2: eth2 { - interrupts = ; + interrupts = ; port-id = <2>; gop-port-id = <3>; status = "disabled"; @@ -103,6 +102,15 @@ reg = <0x12a200 0x10>; }; + cps_icu: interrupt-controller@1e0000 { + compatible = "marvell,icu"; + reg = <0x1e0000 0x10>; + #interrupt-cells = <3>; + interrupt-controller; + interrupt-parent = <&gic>; + gicp = <&gicp>; + }; + cps_syscon0: system-controller@440000 { compatible = "marvell,cp110-system-controller0", "syscon"; @@ -127,7 +135,7 @@ compatible = "marvell,armada-8k-ahci", "generic-ahci"; reg = <0x540000 0x30000>; - interrupts = ; + interrupts = ; clocks = <&cps_syscon0 1 15>; status = "disabled"; }; @@ -137,7 +145,7 @@ "generic-xhci"; reg = <0x500000 0x4000>; dma-coherent; - interrupts = ; + interrupts = ; clocks = <&cps_syscon0 1 22>; status = "disabled"; }; @@ -147,7 +155,7 @@ "generic-xhci"; reg = <0x510000 0x4000>; dma-coherent; - interrupts = ; + interrupts = ; clocks = <&cps_syscon0 1 23>; status = "disabled"; }; @@ -195,7 +203,7 @@ reg = <0x701000 0x20>; #address-cells = <1>; #size-cells = <0>; - interrupts = ; + interrupts = ; clocks = <&cps_syscon0 1 21>; status = "disabled"; }; @@ -205,7 +213,7 @@ reg = <0x701100 0x20>; #address-cells = <1>; #size-cells = <0>; - interrupts = ; + interrupts = ; clocks = <&cps_syscon0 1 21>; status = "disabled"; }; @@ -213,7 +221,7 @@ cps_trng: trng@760000 { compatible = "marvell,armada-8k-rng", "inside-secure,safexcel-eip76"; reg = <0x760000 0x7d>; - interrupts = ; + interrupts = ; clocks = <&cps_syscon0 1 25>; status = "okay"; }; @@ -221,13 +229,13 @@ cps_crypto: crypto@800000 { compatible = "inside-secure,safexcel-eip197"; reg = <0x800000 0x200000>; - interrupts = , - , - , - , - , - ; + , + , + , + , + ; interrupt-names = "mem", "ring0", "ring1", "ring2", "ring3", "eip"; clocks = <&cps_syscon0 1 26>; @@ -254,8 +262,8 @@ /* non-prefetchable memory */ 0x82000000 0 0xfa000000 0 0xfa000000 0 0xf00000>; interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>; - interrupts = ; + interrupt-map = <0 0 0 0 &cps_icu 0 ICU_GRP_NSR 22 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; num-lanes = <1>; clocks = <&cps_syscon0 1 13>; status = "disabled"; @@ -280,8 +288,8 @@ /* non-prefetchable memory */ 0x82000000 0 0xfb000000 0 0xfb000000 0 0xf00000>; interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>; - interrupts = ; + interrupt-map = <0 0 0 0 &cps_icu 0 ICU_GRP_NSR 24 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; num-lanes = <1>; clocks = <&cps_syscon0 1 11>; @@ -307,8 +315,8 @@ /* non-prefetchable memory */ 0x82000000 0 0xfc000000 0 0xfc000000 0 0xf00000>; interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>; - interrupts = ; + interrupt-map = <0 0 0 0 &cps_icu 0 ICU_GRP_NSR 23 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; num-lanes = <1>; clocks = <&cps_syscon0 1 12>;