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bh=XkbICFuTE3bhDDApwIGy5nbgwIHqIEythW7hEXT9AAI=; b=OmNtuxXzfIhuPzdccMMW5XdyDgeo4Wr3G/rtDlLQW9EKClhCoo+O524EXLbCh8TvYl WQkXZSuj3PkVaAU6BN8FuA7KghI1rXMYfeEzKz/RotwIbuWlZEMOJd+GlM9hh6wQ1sJ9 LNCHT2+C91ZhCD6NOw+uMoRG7utzL7JbHWM+TzWS+L57wD+w4UyMLGjaZZkgd0e04DPb pbD9DVrAOc1NM4PzhAjebX1Sd0IAQ+Bvg1XOUmcpRK5zPMlUe62Za1jFax09LhlVrnJM SSrXnr1rL1BsSdFgFsgZ/S4tFrGQzMweSz40FJSN+w7fmrwGjk7uvWVd/DYe4o7eS8Ay DjFA== X-Gm-Message-State: AODbwcDZY/56FXh9t4pnrTs00xYarzzFL/CFXP5BQC2yRVDGkdUziqTC tHs73h6PlJHETA== X-Received: by 10.84.216.24 with SMTP id m24mr45140933pli.281.1497099508669; Sat, 10 Jun 2017 05:58:28 -0700 (PDT) Received: from localhost.localdomain ([117.254.77.124]) by smtp.gmail.com with ESMTPSA id 68sm4376928pfi.26.2017.06.10.05.58.23 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 10 Jun 2017 05:58:27 -0700 (PDT) From: Jagan Teki X-Google-Original-From: Jagan Teki To: Maxime Ripard Subject: [PATCH v2] arm64: allwinner: h5: Add initial Orangepi Zero Plus 2 support Date: Sat, 10 Jun 2017 18:27:54 +0530 Message-Id: <1497099474-5435-1-git-send-email-jteki@openedev.com> X-Mailer: git-send-email 2.7.4 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170610_055849_992951_7A1860FC X-CRM114-Status: GOOD ( 16.76 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Catalin Marinas , linux-sunxi@googlegroups.com, Will Deacon , linux-kernel@vger.kernel.org, Chen-Yu Tsai , Rob Herring , Jagan Teki , Michael Trimarchi , linux-arm-kernel@lists.infradead.org, Icenowy Zheng MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Jagan Teki Orangepi Zero Plus 2 is an open-source single-board computer using the Allwinner h5 SOC. H5 Orangepi Zero Plus 2 has - Quad-core Cortex-A53 - 512MB DDR3 - micrSD slot and 8GB eMMC - Debug TTL UART - HDMI - Wifi + BT - OTG+power supply Signed-off-by: Jagan Teki --- Changes for v2: - Add emmc node arch/arm64/boot/dts/allwinner/Makefile | 1 + .../allwinner/sun50i-h5-orangepi-zero-plus2.dts | 98 ++++++++++++++++++++++ 2 files changed, 99 insertions(+) create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile index 1ea7709..8adba9c 100644 --- a/arch/arm64/boot/dts/allwinner/Makefile +++ b/arch/arm64/boot/dts/allwinner/Makefile @@ -4,6 +4,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-plus.dtb sun50i-a64-pine64.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-sopine-baseboard.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-prime.dtb +dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb always := $(dtb-y) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts new file mode 100644 index 0000000..6136a3f --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts @@ -0,0 +1,98 @@ +/* + * Copyright (C) 2017 Jagan Teki + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; + +#include "sun50i-h5.dtsi" + +#include + +/ { + model = "OrangePi Zero Plus2"; + compatible = "xunlong,orangepi-zero-plus2", "allwinner,sun50i-h5"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory { + reg = <0x40000000 0x20000000>; + }; + + soc { + reg_vcc3v3: vcc3v3 { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + }; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&mmc2 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc2_8bit_pins>; + vmmc-supply = <®_vcc3v3>; + bus-width = <8>; + non-removable; + cap-mmc-hw-reset; + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; +};