| Message ID | 1499255595-31805-2-git-send-email-hayashi.kunihiko@socionext.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Hayashi-san 2017-07-05 20:53 GMT+09:00 Kunihiko Hayashi <hayashi.kunihiko@socionext.com>: > Add nodes of thermal monitor and thermal zone for UniPhier PXs2 SoC. > The thermal monitor is included in sysctrl. > Furthermore, add cpuN labels for reference in cooling-device property. > > Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> > --- Please add socionext,tmod-calibration in case the efuse is not brown. > > + thermal-zones { > + cpu_thermal { > + polling-delay-passive = <250>; /* 250ms */ > + polling-delay = <1000>; /* 1000ms */ > + thermal-sensors = <&pvtctl>; > + > + trips { > + cpu_crit: cpu_crit { > + temperature = <95000>; /* 95C */ > + hysteresis = <2000>; > + type = "critical"; > + }; > + cpu_alert: cpu_alert { > + temperature = <85000>; /* 85C */ > + hysteresis = <2000>; > + type = "passive"; > + }; > + }; > + > + cooling-maps { > + map { > + trip = <&cpu_alert>; > + cooling-device = <&cpu0 (-1) (-1)>; > + }; After all, I decided to use dt-bindings headers. Could you use THERMAL_NO_LIMIT for clarification?
Yamada-san, On Thu, 10 Aug 2017 19:44:38 +0900 <yamada.masahiro@socionext.com> wrote: > Hayashi-san > > > 2017-07-05 20:53 GMT+09:00 Kunihiko Hayashi <hayashi.kunihiko@socionext.com>: > > Add nodes of thermal monitor and thermal zone for UniPhier PXs2 SoC. > > The thermal monitor is included in sysctrl. > > Furthermore, add cpuN labels for reference in cooling-device property. > > > > Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> > > --- > > > Please add socionext,tmod-calibration > in case the efuse is not brown. I see. I'll include it to the pvtctl node in uniphier-pxs2.dtsi. > > > > + thermal-zones { > > + cpu_thermal { > > + polling-delay-passive = <250>; /* 250ms */ > > + polling-delay = <1000>; /* 1000ms */ > > + thermal-sensors = <&pvtctl>; > > + > > + trips { > > + cpu_crit: cpu_crit { > > + temperature = <95000>; /* 95C */ > > + hysteresis = <2000>; > > + type = "critical"; > > + }; > > + cpu_alert: cpu_alert { > > + temperature = <85000>; /* 85C */ > > + hysteresis = <2000>; > > + type = "passive"; > > + }; > > + }; > > + > > + cooling-maps { > > + map { > > + trip = <&cpu_alert>; > > + cooling-device = <&cpu0 (-1) (-1)>; > > + }; > > > After all, I decided to use dt-bindings headers. > Could you use THERMAL_NO_LIMIT for clarification? Okay, I'll replace '(-1)' to THERMAL_NO_LIMIT and add the '#include' directive. --- Best Regards, Kunihiko Hayashi
diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniphier-pxs2.dtsi index e9e031d..1ff5531 100644 --- a/arch/arm/boot/dts/uniphier-pxs2.dtsi +++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi @@ -52,7 +52,7 @@ #address-cells = <1>; #size-cells = <0>; - cpu@0 { + cpu0: cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a9"; reg = <0>; @@ -60,9 +60,10 @@ enable-method = "psci"; next-level-cache = <&l2>; operating-points-v2 = <&cpu_opp>; + #cooling-cells = <2>; }; - cpu@1 { + cpu1: cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a9"; reg = <1>; @@ -72,7 +73,7 @@ operating-points-v2 = <&cpu_opp>; }; - cpu@2 { + cpu2: cpu@2 { device_type = "cpu"; compatible = "arm,cortex-a9"; reg = <2>; @@ -82,7 +83,7 @@ operating-points-v2 = <&cpu_opp>; }; - cpu@3 { + cpu3: cpu@3 { device_type = "cpu"; compatible = "arm,cortex-a9"; reg = <3>; @@ -150,6 +151,34 @@ }; }; + thermal-zones { + cpu_thermal { + polling-delay-passive = <250>; /* 250ms */ + polling-delay = <1000>; /* 1000ms */ + thermal-sensors = <&pvtctl>; + + trips { + cpu_crit: cpu_crit { + temperature = <95000>; /* 95C */ + hysteresis = <2000>; + type = "critical"; + }; + cpu_alert: cpu_alert { + temperature = <85000>; /* 85C */ + hysteresis = <2000>; + type = "passive"; + }; + }; + + cooling-maps { + map { + trip = <&cpu_alert>; + cooling-device = <&cpu0 (-1) (-1)>; + }; + }; + }; + }; + soc { compatible = "simple-bus"; #address-cells = <1>; @@ -387,6 +416,12 @@ compatible = "socionext,uniphier-pxs2-reset"; #reset-cells = <1>; }; + + pvtctl: pvtctl { + compatible = "socionext,uniphier-pxs2-thermal"; + interrupts = <0 3 4>; + #thermal-sensor-cells = <0>; + }; }; }; };
Add nodes of thermal monitor and thermal zone for UniPhier PXs2 SoC. The thermal monitor is included in sysctrl. Furthermore, add cpuN labels for reference in cooling-device property. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> --- arch/arm/boot/dts/uniphier-pxs2.dtsi | 43 ++++++++++++++++++++++++++++++++---- 1 file changed, 39 insertions(+), 4 deletions(-)