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bh=QZu/YJi3LiljeP04hAJkViv8XUnYULwswMgVxB5kJJo=; b=GqNibDCi/fumHY5aUlZR6Wfpm0K7LkCKOCS3XDboR10JeSrgT1p0/WcHglMvS60ja+ O/6JIpvppopQG5x7buO9ijV7Y48t096Ev4aaWVNaQAxwTF7ahvesHEs0VuSGnt4XnzCK F2PMDvh7DEe3aEnw/cgVHCieBUoBK6pLsROTlnouUQKC8yud4DDj+mVpZx6hCG2y5Zoq AZni2wkRE00W4T5kTbWgIWZHuL8/nDMKqfnDiUTJIrgPOfuZ9bU2LyQZDwV82VIjkuiA KwEyTUxBXTV2CTBpCagjRJp8fQqB0majvmEHsJZEDWqppfYwPIMiebMr8loSumVjuUZB 51Ew== X-Gm-Message-State: AIVw111R5KNayNYglwHEYsMBOBBF+84x85ypVlzFDRzOZIvl1I9yRxr3 9A745qoAZyQqHw== X-Received: by 10.80.139.229 with SMTP id n34mr16290480edn.127.1500280065515; Mon, 17 Jul 2017 01:27:45 -0700 (PDT) Received: from localhost.localdomain ([217.78.105.55]) by smtp.gmail.com with ESMTPSA id e28sm8647024ede.14.2017.07.17.01.27.44 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 17 Jul 2017 01:27:44 -0700 (PDT) From: Cosar Dindar To: herbert@gondor.apana.org.au Subject: [RESEND,PATCH v4 3/3] crypto : stm32 - Add STM32F4 CRC32 support Date: Mon, 17 Jul 2017 11:27:36 +0300 Message-Id: <1500280056-46251-1-git-send-email-cosardindar@gmail.com> X-Mailer: git-send-email 2.7.4 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170717_012807_426050_80B1B759 X-CRM114-Status: GOOD ( 16.76 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Cosar Dindar , alexandre.torgue@st.com, linux-kernel@vger.kernel.org, fabien.dessenne@st.com, linux-crypto@vger.kernel.org, mcoquelin.stm32@gmail.com, davem@davemloft.net, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds CRC (CRC32 Crypto) support for STM32F4 series. As an hardware limitation polynomial and key setting are not supported. They are fixed as 0x4C11DB7 (poly) and 0xFFFFFFFF (key). CRC32C Castagnoli algorithm is not used. Signed-off-by: Cosar Dindar Reviewed-by: Fabien Dessenne --- drivers/crypto/stm32/stm32_crc32.c | 68 ++++++++++++++++++++++++++++++++------ 1 file changed, 58 insertions(+), 10 deletions(-) diff --git a/drivers/crypto/stm32/stm32_crc32.c b/drivers/crypto/stm32/stm32_crc32.c index ec83b1e..12fbd98 100644 --- a/drivers/crypto/stm32/stm32_crc32.c +++ b/drivers/crypto/stm32/stm32_crc32.c @@ -7,6 +7,7 @@ #include #include #include +#include #include #include @@ -39,6 +40,9 @@ struct stm32_crc { struct clk *clk; u8 pending_data[sizeof(u32)]; size_t nb_pending_bytes; + bool key_support; + bool poly_support; + bool reverse_support; }; struct stm32_crc_list { @@ -106,13 +110,31 @@ static int stm32_crc_init(struct shash_desc *desc) } spin_unlock_bh(&crc_list.lock); - /* Reset, set key, poly and configure in bit reverse mode */ - writel(bitrev32(mctx->key), ctx->crc->regs + CRC_INIT); - writel(bitrev32(mctx->poly), ctx->crc->regs + CRC_POL); - writel(CRC_CR_RESET | CRC_CR_REVERSE, ctx->crc->regs + CRC_CR); + /* set key */ + if (ctx->crc->key_support) { + writel(bitrev32(mctx->key), ctx->crc->regs + CRC_INIT); + } else if (mctx->key != CRC_INIT_DEFAULT) { + dev_err(ctx->crc->dev, "Unsupported key value! Should be: 0x%x\n", + CRC_INIT_DEFAULT); + return -EINVAL; + } + + /* set poly */ + if (ctx->crc->poly_support) + writel(bitrev32(mctx->poly), ctx->crc->regs + CRC_POL); + + /* reset and configure in bit reverse mode if supported */ + if (ctx->crc->reverse_support) + writel(CRC_CR_RESET | CRC_CR_REVERSE, ctx->crc->regs + CRC_CR); + else + writel(CRC_CR_RESET, ctx->crc->regs + CRC_CR); + + /* store partial result */ + if (!ctx->crc->reverse_support) + ctx->partial = bitrev32(readl(crc->regs + CRC_DR)); + else + ctx->partial = readl(ctx->crc->regs + CRC_DR); - /* Store partial result */ - ctx->partial = readl(ctx->crc->regs + CRC_DR); ctx->crc->nb_pending_bytes = 0; return 0; @@ -135,7 +157,12 @@ static int stm32_crc_update(struct shash_desc *desc, const u8 *d8, if (crc->nb_pending_bytes == sizeof(u32)) { /* Process completed pending data */ - writel(*(u32 *)crc->pending_data, crc->regs + CRC_DR); + if (!ctx->crc->reverse_support) + writel(bitrev32(*(u32 *)crc->pending_data), + crc->regs + CRC_DR); + else + writel(*(u32 *)crc->pending_data, + crc->regs + CRC_DR); crc->nb_pending_bytes = 0; } } @@ -143,10 +170,16 @@ static int stm32_crc_update(struct shash_desc *desc, const u8 *d8, d32 = (u32 *)d8; for (i = 0; i < length >> 2; i++) /* Process 32 bits data */ - writel(*(d32++), crc->regs + CRC_DR); + if (!ctx->crc->reverse_support) + writel(bitrev32(*(d32++)), crc->regs + CRC_DR); + else + writel(*(d32++), crc->regs + CRC_DR); /* Store partial result */ - ctx->partial = readl(crc->regs + CRC_DR); + if (!ctx->crc->reverse_support) + ctx->partial = bitrev32(readl(crc->regs + CRC_DR)); + else + ctx->partial = readl(crc->regs + CRC_DR); /* Check for pending data (non 32 bits) */ length &= 3; @@ -243,6 +276,7 @@ static int stm32_crc_probe(struct platform_device *pdev) struct stm32_crc *crc; struct resource *res; int ret; + int algs_size; crc = devm_kzalloc(dev, sizeof(*crc), GFP_KERNEL); if (!crc) @@ -269,13 +303,26 @@ static int stm32_crc_probe(struct platform_device *pdev) return ret; } + /* set key, poly and reverse support if device is of F7 series */ + if (of_device_is_compatible(crc->dev->of_node, "st,stm32f7-crc")) { + crc->key_support = true; + crc->poly_support = true; + crc->reverse_support = true; + } + platform_set_drvdata(pdev, crc); spin_lock(&crc_list.lock); list_add(&crc->list, &crc_list.dev_list); spin_unlock(&crc_list.lock); - ret = crypto_register_shashes(algs, ARRAY_SIZE(algs)); + /* For F4 series only CRC32 algorithm will be used */ + if (of_device_is_compatible(crc->dev->of_node, "st,stm32f4-crc")) + algs_size = 1; + else + algs_size = ARRAY_SIZE(algs); + + ret = crypto_register_shashes(algs, algs_size); if (ret) { dev_err(dev, "Failed to register\n"); clk_disable_unprepare(crc->clk); @@ -304,6 +351,7 @@ static int stm32_crc_remove(struct platform_device *pdev) static const struct of_device_id stm32_dt_ids[] = { { .compatible = "st,stm32f7-crc", }, + { .compatible = "st,stm32f4-crc", }, {}, }; MODULE_DEVICE_TABLE(of, stm32_dt_ids);