Message ID | 1500397144-16232-13-git-send-email-jintack.lim@linaro.org (mailing list archive) |
---|---|
State | New, archived |
Headers | show
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[128.104.222.82]) by smtp.gmail.com with ESMTPSA id j96sm1413075ioo.49.2017.07.18.09.59.53 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 18 Jul 2017 09:59:54 -0700 (PDT) From: Jintack Lim <jintack.lim@linaro.org> To: kvmarm@lists.cs.columbia.edu, christoffer.dall@linaro.org, marc.zyngier@arm.com Subject: [RFC PATCH v2 12/38] arm64: Add missing TCR hw defines Date: Tue, 18 Jul 2017 11:58:38 -0500 Message-Id: <1500397144-16232-13-git-send-email-jintack.lim@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1500397144-16232-1-git-send-email-jintack.lim@linaro.org> References: <1500397144-16232-1-git-send-email-jintack.lim@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170718_100017_538956_67A2F230 X-CRM114-Status: UNSURE ( 8.18 ) X-CRM114-Notice: Please train this message. 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diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/asm/pgtable-hwdef.h index eb0c2bd..d26cab7 100644 --- a/arch/arm64/include/asm/pgtable-hwdef.h +++ b/arch/arm64/include/asm/pgtable-hwdef.h @@ -272,9 +272,15 @@ #define TCR_TG1_4K (UL(2) << TCR_TG1_SHIFT) #define TCR_TG1_64K (UL(3) << TCR_TG1_SHIFT) +#define TCR_IPS_SHIFT 32 +#define TCR_IPS_MASK (UL(7) << TCR_IPS_SHIFT) + #define TCR_ASID16 (UL(1) << 36) #define TCR_TBI0 (UL(1) << 37) #define TCR_HA (UL(1) << 39) #define TCR_HD (UL(1) << 40) +#define TCR_EPD1 (UL(1) << 23) +#define TCR_EPD0 (UL(1) << 7) + #endif